P

Inventor

PRAGER DANIEL

US13 patents
⚠️ This page may combine multiple inventors who share the name “PRAGER DANIEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TOKYO ELECTRON LTD

8 patents
US7967995B2Jun 28, 2011

Multi-layer/multi-input/multi-output (MLMIMO) models and method for using

TOKYO ELECTRON LTD25 citations92
US7894927B2Feb 22, 2011

Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structures

TOKYO ELECTRON LTD23 citations92
US7328418B2Feb 5, 2008

Iso/nested control for soft mask processing

TOKYO ELECTRON LTD29 citations92
US7209798B2Apr 24, 2007

Iso/nested cascading trim control with model feedback updates

TOKYO ELECTRON LTD24 citations90
US8019458B2Sep 13, 2011

Creating multi-layer/multi-input/multi-output (MLMIMO) models for metal-gate structures

TOKYO ELECTRON LTD14 citations84
US7899637B2Mar 1, 2011

Method and apparatus for creating a gate optimization evaluation library

TOKYO ELECTRON LTD11 citations84
US7305322B2Dec 4, 2007

Using a virtual profile library

TOKYO ELECTRON LTD11 citations84
US7289864B2Oct 30, 2007

Feature dimension deviation correction system, method and program product

TOKYO ELECTRON LTD8 citations70

TIMBRE TECH INC

2 patents
US7126700B2Oct 24, 2006

Parametric optimization of optical metrology model

TIMBRE TECH INC59 citations96
US7395132B2Jul 1, 2008

Optical metrology model optimization for process control

TIMBRE TECH INC11 citations82

TOKYO ELECTON LTD

1 patent
US7713758B2May 11, 2010

Method and apparatus for optimizing a gate channel

TOKYO ELECTON LTD22 citations90

FUNK MERRITT

1 patent
US8183062B2May 22, 2012

Creating metal gate structures using Lithography-Etch-Lithography-Etch (LELE) processing sequences

FUNK MERRITT3 citations61

IBM

1 patent
US7502660B2Mar 10, 2009

Feature dimension deviation correction system, method and program product

IBM0 citations49