Inventor
GUPTA NAVNEET
FR19 patents
⚠️ This page may combine multiple inventors who share the name “GUPTA NAVNEET”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MINIMA PROCESSOR OY
8 patentsUS11558039B2Jan 17, 2023
Method and arrangement for ensuring valid data at a second stage of a digital register circuit
MINIMA PROCESSOR OY2 citations71
US12182612B2Dec 31, 2024
Method, arrangement, and computer program product for organizing the excitation of processing paths for testing a microelectric circuit
MINIMA PROCESSOR OY0 citations54
US12113530B2Oct 8, 2024
Microelectronic circuit capable of selectively activating processing paths, and a method for activating processing paths in a microelectronic circuit
MINIMA PROCESSOR OY0 citations50
US11929746B2Mar 12, 2024
Method and arrangement for protecting a digital circuit against time errors
MINIMA PROCESSOR OY0 citations50
US11699012B2Jul 11, 2023
Coverage based microelectronic circuit, and method for providing a design of a microelectronic circuit
MINIMA PROCESSOR OY0 citations50
US11894848B2Feb 6, 2024
Register circuit with detection of data events, and method for detecting data events in a register circuit
MINIMA PROCESSOR OY0 citations49
US11953970B2Apr 9, 2024
System with microelectronic circuit, and a method for controlling the operation of a microelectronic circuit
MINIMA PROCESSOR OY0 citations43
US12085611B2Sep 10, 2024
Applications of adaptive microelectronic circuits that are designed for testability
MINIMA PROCESSOR OY0 citations42