Inventor
JUNG CHANG HO
KR39 patents
⚠️ This page may combine multiple inventors who share the name “JUNG CHANG HO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HYUNDAI MOTOR CO LTD
9 patentsUS11668438B2Jun 6, 2023
Fluid charging system, nozzle device, and receptacle device
HYUNDAI MOTOR CO LTD2 citations69
US11478882B2Oct 25, 2022
Vehicle body assembly system
HYUNDAI MOTOR CO LTD3 citations68
US8853123B2Oct 7, 2014
LNT catalyst with enhanced nitrogen oxide storage capacity at low temperature
HYUNDAI MOTOR CO LTD3 citations63
US10464621B2Nov 5, 2019
Pre-buck apparatus for vehicle body assembling system
HYUNDAI MOTOR CO LTD1 citations57
US9821293B2Nov 21, 2017
Catalyst for abating a nitrogen oxide, method for preparing the same, and catalyst system for abating a nitrogen oxide
HYUNDAI MOTOR CO LTD1 citations52
US10159958B2Dec 25, 2018
LNT catalyst
HYUNDAI MOTOR CO LTD0 citations42
US10087802B2Oct 2, 2018
Method for controlling regeneration of catalyst
HYUNDAI MOTOR CO LTD0 citations42
US9962653B2May 8, 2018
Catalyzed particulate filter
HYUNDAI MOTOR CO LTD0 citations41
US10789565B2Sep 29, 2020
Engagement guarantee system using a gamification method
HYUNDAI MOTOR CO LTD0 citations33
QUALCOMM INC
8 patentsUS7859920B2Dec 28, 2010
Advanced bit line tracking in high performance memory compilers
QUALCOMM INC64 citations98
US7646658B2Jan 12, 2010
Memory device with delay tracking for improved timing margin
QUALCOMM INC29 citations92
US7499347B2Mar 3, 2009
Self-timing circuit with programmable delay and programmable accelerator circuits
QUALCOMM INC32 citations92
US7881147B2Feb 1, 2011
Clock and control signal generation for high performance memory devices
QUALCOMM INC11 citations84
US7251193B2Jul 31, 2007
Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent
QUALCOMM INC16 citations84
US7760562B2Jul 20, 2010
Address multiplexing in pseudo-dual port memory
QUALCOMM INC5 citations74
US7656731B2Feb 2, 2010
Semi-shared sense amplifier and global read line architecture
QUALCOMM INC7 citations74
US7319632B2Jan 15, 2008
Pseudo-dual port memory having a clock for each port
QUALCOMM INC7 citations74
LSI LOGIC CORP
8 patentsUS7061822B2Jun 13, 2006
Clock generator for pseudo dual port memory
LSI LOGIC CORP6 citations74
US6809983B2Oct 26, 2004
Clock generator for pseudo dual port memory
LSI LOGIC CORP6 citations74
US6586970B1Jul 1, 2003
Address decoder with pseudo and or pseudo nand gate
LSI LOGIC CORP9 citations74
US6950352B1Sep 27, 2005
Method and apparatus for replacing a defective cell within a memory device having twisted bit lines
LSI LOGIC CORP11 citations73
US6518795B1Feb 11, 2003
Design simplicity of very high-speed semiconductor device
LSI LOGIC CORP2 citations63
US6335899B1Jan 1, 2002
Compensation capacitance for minimizing bit line coupling in multiport memory
LSI LOGIC CORP3 citations63
US5973986AOct 26, 1999
Memory device including a column decoder for decoding five columns
LSI LOGIC CORP2 citations63
US6963515B2Nov 8, 2005
Method and device for a scalable memory building block
LSI LOGIC CORP0 citations51
HYUNDAI ELECTRONICS IND
3 patentsUS5963484AOct 5, 1999
High speed single-ended amplifier of a latched type
HYUNDAI ELECTRONICS IND20 citations92
US5686825ANov 11, 1997
Reference voltage generation circuit having compensation function for variations of temperature and supply voltage
HYUNDAI ELECTRONICS IND40 citations91
US5640338AJun 17, 1997
Semiconductor memory device
HYUNDAI ELECTRONICS IND4 citations63
JUNG CHANG HO
3 patentsUS8570818B2Oct 29, 2013
Address multiplexing in pseudo-dual port memory
JUNG CHANG HO10 citations82
US8774402B2Jul 8, 2014
Encryption/decryption apparatus and method using AES rijndael algorithm
JUNG CHANG HO2 citations60
US8780658B2Jul 15, 2014
Leakage reduction in memory devices
JUNG CHANG HO0 citations40