Inventor
SELTZER JEFFREY H
US16 patents
⚠️ This page may combine multiple inventors who share the name “SELTZER JEFFREY H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
15 patentsUS5357153AOct 18, 1994
Macrocell with product-term cascade and improved flip flop utilization
XILINX INC205 citations98
US5563529AOct 8, 1996
High speed product term allocation structure supporting logic iteration after committing device pin locations
XILINX INC58 citations96
US6466049B1Oct 15, 2002
Clock enable control circuit for flip flops
XILINX INC35 citations92
US6172518B1Jan 9, 2001
Method of minimizing power use in programmable logic devices
XILINX INC33 citations92
US5821774AOct 13, 1998
Structure and method for arithmetic function implementation in an EPLD having high speed product term allocation structure
XILINX INC61 citations92
US5764076AJun 9, 1998
Circuit for partially reprogramming an operational programmable logic device
XILINX INC40 citations92
US5302866AApr 12, 1994
Input circuit block and method for PLDs with register clock enable selection
XILINX INC33 citations92
US5991523ANov 23, 1999
Method and system for HDL global signal simulation and verification
XILINX INC59 citations90
US10819680B1Oct 27, 2020
Interface firewall for an integrated circuit of an expansion card
XILINX INC9 citations82
US7970977B1Jun 28, 2011
Deadlock-resistant bus bridge with pipeline-restricted address ranges
XILINX INC17 citations82
US5565792AOct 15, 1996
Macrocell with product-term cascade and improved flip flop utilization
XILINX INC14 citations81
US5969539AOct 19, 1999
Product term exporting mechanism and method improvement in an EPLD having high speed product term allocation structure
XILINX INC16 citations71
US6980030B1Dec 27, 2005
Embedded function units with decoding
XILINX INC2 citations61
US10970446B1Apr 6, 2021
Automated pipeline insertion on a bus
XILINX INC0 citations51
US8769449B1Jul 1, 2014
System level circuit design
XILINX INC1 citations49