Inventor
LEE HERNG-JER
TW10 patents
Patents
10 patentsUS7191418B2Mar 13, 2007
Method and apparatus for rapidly selecting types of buffers which are inserted into the clock tree for high-speed very-large-scale-integration
UNIV CHANG GUNG25 citations91
US7181664B2Feb 20, 2007
Method on scan chain reordering for lowering VLSI power consumption
UNIV CHANG GUNG14 citations83
US7254790B2Aug 7, 2007
Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops
UNIV CHANG GUNG8 citations72
US7373367B2May 13, 2008
Efficient digital filter design tool for approximating an FIR filter with a low-order linear-phase IIR filter
UNIV CHANG GUNG3 citations61
US7216309B2May 8, 2007
Method and apparatus for model-order reduction and sensitivity analysis
UNIV CHANG GUNG6 citations61
US7124381B2Oct 17, 2006
Method of estimating crosstalk noise in lumped RLC coupled interconnects
UNIV CHANG GUNG7 citations61
US7017130B2Mar 21, 2006
Method of verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits
UNIV CHANG GUNG7 citations61
US7797140B2Sep 14, 2010
Generalizations of adjoint networks techniques for RLC interconnects model-order reductions
UNIV CHANG GUNG2 citations50
US7512525B2Mar 31, 2009
Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders
UNIV CHANG GUNG0 citations40
US7437689B2Oct 14, 2008
Interconnect model-order reduction method
UNIV CHANG GUNG0 citations40