Inventor

BREITWISCH MATTHEW J

US95 patents

⚠️ This page may combine multiple inventors who share the name “BREITWISCH MATTHEW J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BREITWISCH MATTHEW J

IBM

Substrate backgate for trigate FET

Fin-type antifuse

Phase change memory cell with limited switchable volume

Phase change material with filament electrode

Single mask adder phase change memory element

Phase change memory device and method of manufacture

Vertical field effect transistor arrays and methods for fabrication thereof

Measurement method for reading multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition

Phase change memory cell with electrode

Virtual body-contacted trigate

Embedded one-time programmable non-volatile memory using prompt shift device

Small footprint phase change memory cell

Phase change memory device with plated phase change material

Iteratively writing contents to memory locations using a statistical model

Chemical mechanical polishing stop layer for fully amorphous phase change memory pore cell

Pore phase change material cell fabricated from recessed pillar

Self-converging bottom electrode ring

Wafer bonded access device for multi-layer phase change memory using lock-and-key alignment

Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition

Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition

Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition

Thin film phase change memory cell formed on silicon-on-insulator substrate

Isolated fully depleted silicon-on-insulator regions by selective etch

BREITWISCH MATTHEW J

Resistive memory devices having a not-and (NAND) structure

Area efficient neuromorphic system that connects a FET in a diode configuration, and a variable resistance material to junctions of neuron circuit blocks

Area efficient neuromorphic circuits using field effect transistors (FET) and variable resistance material

Method to reduce a via area in a phase change memory cell

In via formed phase change memory cell with recessed pillar heater

Small footprint phase change memory cell

Phase change memory electrode with sheath for reduced programming current

In via formed phase change memory cell with recessed pillar heater

Flat lower bottom electrode for phase change memory cell

Flat lower bottom electrode for phase change memory cell

Phase change memory device suitable for high temperature operation

Self-aligned lower bottom electrode

Vertical field effect transistor arrays including gate electrodes annularly surrounding semiconductor pillars

MACRONIX INT CO LTD

Phase change memory program method without over-reset

Fill-in etching free pore device

Programmable resistive memory with diode structure

Composite target sputtering for forming doped phase change materials

Phase change memory having one or more non-constant doping profiles

LUNG HSIANG-LAN

Phase change memory cell array with self-converged bottom electrode and method for manufacturing

Self aligned fin-type programmable memory cell

Self-aligned bit line under word line memory array

CHENG HUAI-YU

Ge-Rich GST-212 phase change memory materials

Composite target sputtering for forming doped phase change materials

INFINEON TECHNOLOGIES CORP

Sense circuit for resistive memory

LUNG HSIANG LAN

Method for manufacturing a phase change memory device with pillar bottom electrode

LAI SHENG-CHIH

Thermally confined electrode for programmable resistance memory

SCHROTT ALEJANDRO G

Pore phase change material cell fabricated from recessed pillar