Inventor
SONAWANE MILIND
US16 patents
⚠️ This page may combine multiple inventors who share the name “SONAWANE MILIND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NVIDIA CORP
15 patentsUS10281524B2May 7, 2019
Test partition external input/output interface control for test partitions in a semiconductor
NVIDIA CORP6 citations82
US10317463B2Jun 11, 2019
Scan system interface (SSI) module
NVIDIA CORP6 citations80
US9395414B2Jul 19, 2016
System for reducing peak power during scan shift at the local level for scan based tests
NVIDIA CORP4 citations70
US9377510B2Jun 28, 2016
System for reducing peak power during scan shift at the global level for scan based tests
NVIDIA CORP5 citations70
US9222981B2Dec 29, 2015
Global low power capture scheme for cores
NVIDIA CORP5 citations70
US10444280B2Oct 15, 2019
Independent test partition clock coordination across multiple test partitions
NVIDIA CORP2 citations69
US12291219B2May 6, 2025
Asynchronous in-system testing for autonomous systems and applications
NVIDIA CORP0 citations57
US11668750B2Jun 6, 2023
Performing testing utilizing staggered clocks
NVIDIA CORP0 citations54
US9829536B2Nov 28, 2017
Performing on-chip partial good die identification
NVIDIA CORP0 citations50
US10545189B2Jan 28, 2020
Granular dynamic test systems and methods
NVIDIA CORP0 citations48
US10473720B2Nov 12, 2019
Dynamic independent test partition clock
NVIDIA CORP0 citations48
US10481203B2Nov 19, 2019
Granular dynamic test systems and methods
NVIDIA CORP0 citations46
US10451676B2Oct 22, 2019
Method and system for dynamic standard test access (DSTA) for a logic block reuse
NVIDIA CORP0 citations45
US12579049B2Mar 17, 2026
In-system testing for autonomous systems and applications
NVIDIA CORP0 citations44
US9885753B2Feb 6, 2018
Scan systems and methods
NVIDIA CORP0 citations38