P

Inventor

TUNGA KRISHNA R

US38 patents
⚠️ This page may combine multiple inventors who share the name “TUNGA KRISHNA R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

35 patents
US9754905B1Sep 5, 2017

Final passivation for wafer level warpage and ULK stress reduction

IBM6 citations83
US11302651B2Apr 12, 2022

Laminated stiffener to control the warpage of electronic chip carriers

IBM2 citations73
US10665524B2May 26, 2020

Electronic package cover having underside rib

IBM1 citations73
US10424527B2Sep 24, 2019

Electronic package with tapered pedestal

IBM5 citations73
US10276534B2Apr 30, 2019

Reduction of solder interconnect stress

IBM2 citations73
US9947598B1Apr 17, 2018

Determining crackstop strength of integrated circuit assembly at the wafer level

IBM3 citations73
US11282773B2Mar 22, 2022

Enlarged conductive pad structures for enhanced chip bond assembly yield

IBM2 citations72
US10756031B1Aug 25, 2020

Decoupling capacitor stiffener

IBM2 citations72
US10426400B2Oct 1, 2019

Optimized individual sleep patterns

IBM2 citations72
US10916154B2Feb 9, 2021

Language learning and speech enhancement through natural language processing

IBM3 citations71
US11210968B2Dec 28, 2021

Behavior-based interactive educational sessions

IBM2 citations69
US9865557B1Jan 9, 2018

Reduction of solder interconnect stress

IBM1 citations63
US11784160B2Oct 10, 2023

Asymmetric die bonding

IBM0 citations62
US11744981B2Sep 5, 2023

Internet of things (IoT) real-time response to defined symptoms

IBM0 citations62
US11545444B2Jan 3, 2023

Mitigating cooldown peeling stress during chip package assembly

IBM0 citations62
US11185658B2Nov 30, 2021

Internet of things (IOT) real-time response to defined symptoms

IBM0 citations62
US10950573B2Mar 16, 2021

Lead-free column interconnect

IBM0 citations62
US10541211B2Jan 21, 2020

Control warpage in a semiconductor chip package

IBM1 citations62
US10325830B1Jun 18, 2019

Multipart lid for a semiconductor package with multiple components

IBM1 citations62
US11239183B2Feb 1, 2022

Mitigating thermal-mechanical strain and warpage of an organic laminate substrate

IBM0 citations61
US11302205B2Apr 12, 2022

Language learning and speech enhancement through natural language processing

IBM0 citations60
US10832987B2Nov 10, 2020

Managing thermal warpage of a laminate

IBM0 citations52
US10636746B2Apr 28, 2020

Method of forming an electronic package

IBM0 citations52
US10622275B2Apr 14, 2020

Electronic package cover having underside rib

IBM0 citations52
US10276535B2Apr 30, 2019

Method of fabricating contacts of an electronic package structure to reduce solder interconnect stress

IBM0 citations52
US9837333B1Dec 5, 2017

Electronic package cover having underside rib

IBM0 citations52
US9563732B1Feb 7, 2017

In-plane copper imbalance for warpage prediction

IBM1 citations52
US8860206B2Oct 14, 2014

Multichip electronic packages and methods of manufacture

IBM0 citations52
US10985129B2Apr 20, 2021

Mitigating cracking within integrated circuit (IC) device carrier

IBM0 citations51
US10622319B2Apr 14, 2020

Final passivation for wafer level warpage and ULK stress reduction

IBM0 citations51
US10420502B2Sep 24, 2019

Optimized individual sleep patterns

IBM0 citations51
US10381276B2Aug 13, 2019

Test cell for laminate and method

IBM0 citations50
US10249548B2Apr 2, 2019

Test cell for laminate and method

IBM0 citations50
US10108753B2Oct 23, 2018

Laminate substrate thermal warpage prediction for designing a laminate substrate

IBM0 citations42
US10770385B2Sep 8, 2020

Connected plane stiffener within integrated circuit chip carrier

IBM0 citations41

SIKKA KAMAL K

1 patent

ELPIS TECH INC

1 patent

BODENWEBER PAUL F

1 patent