Inventor
MAILLARD PIERRE
US15 patents
⚠️ This page may combine multiple inventors who share the name “MAILLARD PIERRE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
14 patentsUS9484919B1Nov 1, 2016
Selection of logic paths for redundancy
XILINX INC7 citations83
US9281807B1Mar 8, 2016
Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit
XILINX INC12 citations83
US9236354B2Jan 12, 2016
Integrated circuit package with thermal neutron shielding
XILINX INC3 citations72
US9183338B1Nov 10, 2015
Single-event upset mitigation in circuit design for programmable integrated circuits
XILINX INC5 citations72
US9825632B1Nov 21, 2017
Circuit for and method of preventing multi-bit upsets induced by single event transients
XILINX INC3 citations71
US10033388B1Jul 24, 2018
Circuit for and method of enabling the selection of a circuit
XILINX INC4 citations70
US9793899B1Oct 17, 2017
Mitigation of single event latchup
XILINX INC5 citations68
US10958067B2Mar 23, 2021
Single event latch-up (SEL) mitigation detect and mitigation
XILINX INC0 citations60
US10574214B1Feb 25, 2020
Circuit for and method of storing data in an integrated circuit device
XILINX INC1 citations60
US10263623B1Apr 16, 2019
Circuit for and method of storing data in an integrated circuit device
XILINX INC1 citations60
US11652481B2May 16, 2023
Designing single event upset latches
XILINX INC1 citations58
US12346226B2Jul 1, 2025
System and method for SEU detection and correction
XILINX INC0 citations51
US10861848B2Dec 8, 2020
Single event latch-up (SEL) mitigation techniques
XILINX INC0 citations51
US10366999B2Jul 30, 2019
Single event upset (SEU) mitigation for FinFET technology using fin topology
XILINX INC0 citations51