Inventor

LEE PEI-HSUAN

TW42 patents

⚠️ This page may combine multiple inventors who share the name “LEE PEI-HSUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE PEI-HSUAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Selective capping processes and structures formed thereby

Selective capping processes and structures formed thereby

Method of manufacturing integrated fan-out package

Integrated circuit package and method

Package structure

Integrated circuit package and method

Physical vapor deposition system and physical vapor depositing method using the same

Chip packages and methods of manufacture thereof

Package structure and manufacturing method thereof

Selective capping processes and structures formed thereby

Method of manufacturing integrated fan-out package

Interconnect structure and method of forming thereof

Method for manufacturing semiconductor device and pre-clean apparatus for semiconductor device

Overlay error and process window metrology

Wafer-level testing method and test structure thereof

Package system and manufacturing method thereof

Integrated circuit package and method

In-line electrical detection of defects at wafer level

Package system and manufacturing method thereof

Integrated circuit packages having support rings

Selective capping processes and structures formed thereby

Package structure

Method of forming integrated circuit packages with mechanical braces

Integrated fan-out package and manufacturing method thereof

Method of forming an interconnect in a semiconductor device

Package structure and manufacturing method thereof

Nitrogen plasma treatment for improving interface between etch stop layer and copper interconnect

Electronic device and manufacturing method thereof

Electronic device and manufacturing method thereof

Method of forming interconnect structure having a barrier layer

Method for forming semiconductor device

Method and system for scanning wafer

Method and system for scanning wafer

Method and system for scanning wafer

Forming liners to facilitate the formation of copper-containing vias in advanced technology nodes

Method of integration process for metal CMP

Package-on-package structures and methods of manufacture thereof

Semiconductor structure inspection using a high atomic number material

Nitrogen plasma treatment for improving interface between etch stop layer and copper interconnect

Overlay error and process window metrology

DAH FENG CAPSULE IND CO LTD

Debranching enzyme modified starch, the preparing method and use thereof in hard capsule production

Acid resistant capsule shell composition