P

Inventor

GARDINER ALLEN B

US17 patents

Patents

17 patents
US11758711B2Sep 12, 2023

Thin-film transistor embedded dynamic random-access memory with shallow bitline

INTEL CORP2 citations72
US11329047B2May 10, 2022

Thin-film transistor embedded dynamic random-access memory with shallow bitline

INTEL CORP4 citations72
US12532538B2Jan 20, 2026

Integrated circuit structures having conductive structures in fin isolation regions

INTEL CORP0 citations62
US12419085B2Sep 16, 2025

Integrated circuit structures having backside gate tie-down

INTEL CORP0 citations62
US12080643B2Sep 3, 2024

Integrated circuit structures having differentiated interconnect lines in a same dielectric layer

INTEL CORP0 citations62
US12598803B2Apr 7, 2026

Integrated circuit structures having gate cut offset

INTEL CORP0 citations61
US12426247B2Sep 23, 2025

Capacitor connections in dielectric layers

INTEL CORP0 citations61
US11991873B2May 21, 2024

Capacitor separations in dielectric layers

INTEL CORP0 citations61
US11832438B2Nov 28, 2023

Capacitor connections in dielectric layers

INTEL CORP0 citations61
US11610894B2Mar 21, 2023

Capacitor separations in dielectric layers

INTEL CORP0 citations61
US11563107B2Jan 24, 2023

Method of contact patterning of thin film transistors for embedded DRAM using a multi-layer hardmask

INTEL CORP0 citations59
US12490460B2Dec 2, 2025

Dielectric sidewall features for tuning thin film transistor (TFT) parasitics

INTEL CORP0 citations58
US7691544B2Apr 6, 2010

Measurement of a scattered light point spread function (PSF) for microelectronic photolithography

INTEL CORP4 citations57
US11404536B2Aug 2, 2022

Thin-film transistor structures with gas spacer

INTEL CORP0 citations51
US7666796B2Feb 23, 2010

Substrate patterning for multi-gate transistors

INTEL CORP1 citations51
US11652047B2May 16, 2023

Intermediate separation layers at the back-end-of-line

INTEL CORP0 citations50
US12557363B2Feb 17, 2026

Gate cut structures formed before dummy gate

INTEL CORP0 citations45