Inventor
GHEEWALA TUSHAR R
US24 patents
⚠️ This page may combine multiple inventors who share the name “GHEEWALA TUSHAR R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
6 patentsUS4365317ADec 21, 1982
Superconductive latch circuit
IBM73 citations96
US4691277ASep 1, 1987
Small instruction cache using branch target table to effect instruction prefetch
IBM53 citations89
US4313066AJan 26, 1982
Direct coupled nonlinear injection Josephson logic circuits
IBM15 citations74
US4533840AAug 6, 1985
Soliton sampler
IBM19 citations67
US4392148AJul 5, 1983
Moat-guarded Josephson devices
IBM8 citations67
US4459495AJul 10, 1984
Josephson current regulator
IBM6 citations63
VIRAGE LOGIC CORP
5 patentsUS6617621B1Sep 9, 2003
Gate array architecture using elevated metal levels for customization
VIRAGE LOGIC CORP229 citations98
US6838713B1Jan 4, 2005
Dual-height cell with variable width power rail architecture
VIRAGE LOGIC CORP68 citations97
US7069522B1Jun 27, 2006
Various methods and apparatuses to preserve a logic state for a volatile latch circuit
VIRAGE LOGIC CORP46 citations95
US7129562B1Oct 31, 2006
Dual-height cell with variable width power rail architecture
VIRAGE LOGIC CORP43 citations92
US7603634B2Oct 13, 2009
Various methods and apparatuses to preserve a logic state for a volatile latch circuit
VIRAGE LOGIC CORP15 citations83
IN CHIP SYSTEMS INC
4 patentsUS6445065B1Sep 3, 2002
Routing driven, metal programmable integrated circuit architecture with multiple types of core cells
IN CHIP SYSTEMS INC211 citations98
US5923059AJul 13, 1999
Integrated circuit cell architecture and routing scheme
IN CHIP SYSTEMS INC257 citations98
US5923060AJul 13, 1999
Reduced area gate array cell design based on shifted placement of alternate rows of cells
IN CHIP SYSTEMS INC148 citations98
US6091090AJul 18, 2000
Power and signal routing technique for gate array design
IN CHIP SYSTEMS INC53 citations92
CROSSCHECK TECHNOLOGY INC
2 patentsCROSS CHECK TECHNOLOGY INC
2 patentsUS5065090ANov 12, 1991
Method for testing integrated circuits having a grid-based, "cross-check" te
CROSS CHECK TECHNOLOGY INC43 citations92
US5202624AApr 13, 1993
Interface between ic operational circuitry for coupling test signal from internal test matrix
CROSS CHECK TECHNOLOGY INC25 citations86