Inventor

HARTOOG MARK R

US10 patents

⚠️ This page may combine multiple inventors who share the name “HARTOOG MARK R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VLSI TECHNOLOGY INC

9 patents

US5638291AJun 10, 1997

Method and apparatus for making integrated circuits by inserting buffers into a netlist to control clock skew

VLSI TECHNOLOGY INC63 citations93

US5856927AJan 5, 1999

Method for automatically routing circuits of very large scale integration (VLSI)

VLSI TECHNOLOGY INC112 citations92

US5521836AMay 28, 1996

Method for determining instance placements in circuit layouts

VLSI TECHNOLOGY INC35 citations92

US5367469ANov 22, 1994

Predictive capacitance layout method for integrated circuits

VLSI TECHNOLOGY INC24 citations92

US5197015AMar 23, 1993

System and method for setting capacitive constraints on synthesized logic circuits

VLSI TECHNOLOGY INC35 citations92

US5313079AMay 17, 1994

Gate array bases with flexible routing

VLSI TECHNOLOGY INC50 citations88

USRE35671ENov 25, 1997

Predictive capacitance layout method for integrated circuits

VLSI TECHNOLOGY INC12 citations73

US5295088AMar 15, 1994

Method for predicting capacitance of connection nets on an integrated circuit

VLSI TECHNOLOGY INC10 citations73

US5193092AMar 9, 1993

Integrated parity-based testing for integrated circuits

VLSI TECHNOLOGY INC17 citations69

VSLI TECHNOLOGY INC

1 patent

US5974245AOct 26, 1999

Method and apparatus for making integrated circuits by inserting buffers into a netlist

VSLI TECHNOLOGY INC69 citations93