Inventor
FARRELL MARK STEVEN
US20 patents
Patents
20 patentsUS6119219ASep 12, 2000
System serialization with early release of individual processor
IBM98 citations97
US6079013AJun 20, 2000
Multiprocessor serialization with early release of processors
IBM76 citations95
US6058470AMay 2, 2000
Specialized millicode instruction for translate and test
IBM33 citations92
US5802359ASep 1, 1998
Mapping processor state into a millicode addressable processor state register array
IBM38 citations92
US5790844AAug 4, 1998
Millicode load and test access instruction that blocks interrupts in response to access exceptions
IBM23 citations92
US5748951AMay 5, 1998
Specialized millicode instructions which reduce cycle time and number of instructions necessary to perform complex operations
IBM21 citations92
US5694587ADec 2, 1997
Specialized millicode instructions for test PSW validity, load with access test, and character translation assist
IBM20 citations92
US6044454AMar 28, 2000
IEEE compliant floating point unit
IBM39 citations90
US5694617ADec 2, 1997
System for prioritizing quiesce requests and recovering from a quiescent state in a multiprocessing system with a milli-mode operation
IBM40 citations87
US6125444ASep 26, 2000
Millimode capable computer system providing global branch history table disables and separate millicode disables which enable millicode disable to be turned off for some sections of code execution but not disabled for all
IBM18 citations84
US6108776AAug 22, 2000
Globally or selectively disabling branch history table operations during sensitive portion of millicode routine in millimode supporting computer
IBM18 citations84
US5713035AJan 27, 1998
Linking program access register number with millicode operand access
IBM18 citations82
US6105109AAug 15, 2000
System speed loading of a writable cache code array
IBM11 citations73
US6055624AApr 25, 2000
Millicode flags with specialized update and branch instructions
IBM13 citations73
US5673391ASep 30, 1997
Hardware retry trap for millicoded processor
IBM8 citations73
US5819078AOct 6, 1998
Addressing extended memory using millicode by concatenating a small millicode address and address extension data
IBM6 citations71
US5680598AOct 21, 1997
Millicode extended memory addressing using operand access control register to control extended address concatenation
IBM9 citations71
US5684975ANov 4, 1997
Method for use in translating virtual addresses into absolute addresses
IBM2 citations60
US5754810AMay 19, 1998
Specialized millicode instruction for certain decimal operations
IBM5 citations55
US5649140AJul 15, 1997
System for use in translating virtual addresses into absolute addresses
IBM1 citations50