Inventor
WALRATH CRAIG A
US21 patents
⚠️ This page may combine multiple inventors who share the name “WALRATH CRAIG A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD DEVELOPMENT CO
7 patentsUS7598702B2Oct 6, 2009
Power management system and method for controlling use of power-consuming applications
HEWLETT PACKARD DEVELOPMENT CO53 citations97
US8004234B2Aug 23, 2011
Prioritizing power-consuming applications of an electronic device powered by a battery
HEWLETT PACKARD DEVELOPMENT CO23 citations92
US7934107B2Apr 26, 2011
Power management system and method
HEWLETT PACKARD DEVELOPMENT CO24 citations92
US10228745B2Mar 12, 2019
Resuming a system-on-a-chip device
HEWLETT PACKARD DEVELOPMENT CO2 citations66
US7834585B2Nov 16, 2010
Prioritizing power-consuming applications of an electronic device powered by a battery
HEWLETT PACKARD DEVELOPMENT CO0 citations52
US10521006B2Dec 31, 2019
Report updated threshold level based on parameter
HEWLETT PACKARD DEVELOPMENT CO0 citations49
US10061380B2Aug 28, 2018
Report updated threshold level based on parameter
HEWLETT PACKARD DEVELOPMENT CO0 citations49
WALRATH CRAIG A
6 patentsUS9397834B2Jul 19, 2016
Scrambling an address and encrypting write data for storing in a storage device
WALRATH CRAIG A7 citations83
US8839000B2Sep 16, 2014
System and method for securely storing data in an electronic device
WALRATH CRAIG A4 citations72
US8312559B2Nov 13, 2012
System and method of wireless security authentication
WALRATH CRAIG A6 citations71
US9491627B2Nov 8, 2016
Recovering data in a storage medium of an electronic device that has been tampered with
WALRATH CRAIG A0 citations51
US9269122B2Feb 23, 2016
First and second software stacks and discrete and integrated graphics processing units
WALRATH CRAIG A0 citations51
US9317309B2Apr 19, 2016
Virtualized environment allocation system and method
WALRATH CRAIG A0 citations40
NCR CO
4 patentsUS5359715AOct 25, 1994
Architectures for computer systems having multiple processors, multiple system buses and multiple I/O buses interfaced via multiple ported interfaces
NCR CO71 citations94
US5392407AFeb 21, 1995
Multi-port processor with peripheral component interconnect port and rambus port
NCR CO147 citations93
US5386540AJan 31, 1995
Method and apparatus for transferring data within a computer using a burst sequence which includes modified bytes and a minimum number of unmodified bytes
NCR CO41 citations86
US5212799AMay 18, 1993
Method and apparatus for storing a data block in multiple memory banks within a computer
NCR CO3 citations60
NCR CORP
2 patentsUS5418914AMay 23, 1995
Retry scheme for controlling transactions between two busses
NCR CORP33 citations90
US5454082ASep 26, 1995
System for preventing an unselected controller from transferring data via a first bus while concurrently permitting it to transfer data via a second bus
NCR CORP13 citations73