Inventor
GHARACHORLOO KOUROSH
US39 patents
⚠️ This page may combine multiple inventors who share the name “GHARACHORLOO KOUROSH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD DEVELOPMENT CO
22 patentsUS6668308B2Dec 23, 2003
Scalable architecture based on single-chip multiprocessing
HEWLETT PACKARD DEVELOPMENT CO223 citations99
US6988170B2Jan 17, 2006
Scalable architecture based on single-chip multiprocessing
HEWLETT PACKARD DEVELOPMENT CO97 citations98
US6725334B2Apr 20, 2004
Method and system for exclusive two-level caching in a chip-multiprocessor
HEWLETT PACKARD DEVELOPMENT CO118 citations98
US6633960B1Oct 14, 2003
Scalable directory based cache coherence protocol
HEWLETT PACKARD DEVELOPMENT CO88 citations98
US6697919B2Feb 24, 2004
System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system
HEWLETT PACKARD DEVELOPMENT CO108 citations97
US6675265B2Jan 6, 2004
Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants
HEWLETT PACKARD DEVELOPMENT CO93 citations97
US6636949B2Oct 21, 2003
System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessing
HEWLETT PACKARD DEVELOPMENT CO80 citations97
US6622217B2Sep 16, 2003
Cache coherence protocol engine system and method for processing memory transaction in distinct address subsets during interleaved time periods in a multiprocessor system
HEWLETT PACKARD DEVELOPMENT CO114 citations97
US6725343B2Apr 20, 2004
System and method for generating cache coherence directory entries and error correction codes in a multiprocessor system
HEWLETT PACKARD DEVELOPMENT CO61 citations96
US6640287B2Oct 28, 2003
Scalable multiprocessor system and cache coherence method incorporating invalid-to-dirty requests
HEWLETT PACKARD DEVELOPMENT CO60 citations94
US7152191B2Dec 19, 2006
Fault containment and error recovery in a scalable multiprocessor
HEWLETT PACKARD DEVELOPMENT CO19 citations92
US6751710B2Jun 15, 2004
Scalable multiprocessor system and cache coherence method
HEWLETT PACKARD DEVELOPMENT CO23 citations92
US6748498B2Jun 8, 2004
Scalable multiprocessor system and cache coherence method implementing store-conditional memory transactions while an associated directory entry is encoded as a coarse bit vector
HEWLETT PACKARD DEVELOPMENT CO31 citations92
US6678840B1Jan 13, 2004
Fault containment and error recovery in a scalable multiprocessor
HEWLETT PACKARD DEVELOPMENT CO29 citations92
US6751720B2Jun 15, 2004
Method and system for detecting and resolving virtual address synonyms in a two-level cache hierarchy
HEWLETT PACKARD DEVELOPMENT CO42 citations91
US7389389B2Jun 17, 2008
System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system
HEWLETT PACKARD DEVELOPMENT CO12 citations84
US6738868B2May 18, 2004
System for minimizing directory information in scalable multiprocessor systems with logically independent input/output nodes
HEWLETT PACKARD DEVELOPMENT CO14 citations84
US6622218B2Sep 16, 2003
Cache coherence protocol engine and method for efficient processing of interleaved memory transactions in a multiprocessor system
HEWLETT PACKARD DEVELOPMENT CO18 citations83
US7502895B2Mar 10, 2009
Techniques for reducing castouts in a snoop filter
HEWLETT PACKARD DEVELOPMENT CO9 citations80
US6918015B2Jul 12, 2005
Scalable directory based cache coherence protocol
HEWLETT PACKARD DEVELOPMENT CO10 citations74
US6925537B2Aug 2, 2005
Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants
HEWLETT PACKARD DEVELOPMENT CO11 citations73
US6912624B2Jun 28, 2005
Method and system for exclusive two-level caching in a chip-multiprocessor
HEWLETT PACKARD DEVELOPMENT CO4 citations63
COMPAQ COMPUTER CORP
6 patentsUS6108737AAug 22, 2000
Method and apparatus for reducing latency of inter-reference ordering in a multiprocessor system
COMPAQ COMPUTER CORP148 citations99
US6055605AApr 25, 2000
Technique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared caches
COMPAQ COMPUTER CORP181 citations99
US6209065B1Mar 27, 2001
Mechanism for optimizing generation of commit-signals in a distributed shared-memory system
COMPAQ COMPUTER CORP144 citations98
US6101420AAug 8, 2000
Method and apparatus for disambiguating change-to-dirty commands in a switch based multi-processing system with coarse directories
COMPAQ COMPUTER CORP90 citations97
US6085263AJul 4, 2000
Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor
COMPAQ COMPUTER CORP111 citations97
US6286090B1Sep 4, 2001
Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches
COMPAQ COMPUTER CORP66 citations96
DIGITAL EQUIPMENT CORP
4 patentsUS5933598AAug 3, 1999
Method for sharing variable-grained memory of workstations by sending particular block including line and size of the block to exchange shared data structures
DIGITAL EQUIPMENT CORP533 citations99
US6088771AJul 11, 2000
Mechanism for reducing latency of memory barrier operations on a multiprocessor system
DIGITAL EQUIPMENT CORP142 citations98
US5950228ASep 7, 1999
Variable-grained memory sharing for clusters of symmetric multi-processors using private and shared state tables
DIGITAL EQUIPMENT CORP93 citations97
US5787480AJul 28, 1998
Lock-up free data sharing
DIGITAL EQUIPMENT CORP77 citations96
GOOGLE INC
4 patentsUS7254580B1Aug 7, 2007
System and method for selectively searching partitions of a database
GOOGLE INC117 citations97
US7174346B1Feb 6, 2007
System and method for searching an extended database
GOOGLE INC75 citations97
US7523016B1Apr 21, 2009
Detecting anomalies
GOOGLE INC296 citations96
US7467131B1Dec 16, 2008
Method and system for query data caching and optimization in a search engine system
GOOGLE INC85 citations96