P

Inventor

JOSHI SUBHASH M

US38 patents
⚠️ This page may combine multiple inventors who share the name “JOSHI SUBHASH M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

31 patents
US9466565B2Oct 11, 2016

Self-aligned contacts

INTEL CORP24 citations97
US6853076B2Feb 8, 2005

Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same

INTEL CORP203 citations97
US7196001B2Mar 27, 2007

Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same

INTEL CORP34 citations95
US9508821B2Nov 29, 2016

Self-aligned contacts

INTEL CORP13 citations92
US7087452B2Aug 8, 2006

Edge arrangements for integrated circuit chips

INTEL CORP59 citations92
US11887891B2Jan 30, 2024

Self-aligned contacts

INTEL CORP2 citations84
US11664439B2May 30, 2023

Trench contact structures for advanced integrated circuit structure fabrication

INTEL CORP2 citations84
US11088261B2Aug 10, 2021

Trench contact structures for advanced integrated circuit structure fabrication

INTEL CORP3 citations84
US10957782B2Mar 23, 2021

Trench contact structures for advanced integrated circuit structure fabrication

INTEL CORP2 citations84
US10930557B2Feb 23, 2021

Self-aligned contacts

INTEL CORP2 citations84
US10141226B2Nov 27, 2018

Self-aligned contacts

INTEL CORP2 citations84
US9653584B2May 16, 2017

Pre-sculpting of Si fin elements prior to cladding for transistor channel applications

INTEL CORP7 citations84
US9633835B2Apr 25, 2017

Transistor fabrication technique including sacrificial protective layer for source/drain at contact location

INTEL CORP7 citations84
US9425316B2Aug 23, 2016

Source/drain contacts for non-planar transistors

INTEL CORP4 citations83
US7250678B2Jul 31, 2007

Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same

INTEL CORP10 citations83
US6740427B2May 25, 2004

Thermo-mechanically robust C4 ball-limiting metallurgy to prevent failure due to die-package interaction and method of making same

INTEL CORP13 citations81
US12255247B2Mar 18, 2025

Trench contact structures for advanced integrated circuit structure fabrication

INTEL CORP0 citations73
US11948997B2Apr 2, 2024

Trench contact structures for advanced integrated circuit structure fabrication

INTEL CORP0 citations73
US9853156B2Dec 26, 2017

Source/drain contacts for non-planar transistors

INTEL CORP3 citations72
US12266571B2Apr 1, 2025

Self-aligned contacts

INTEL CORP0 citations62
US11600524B2Mar 7, 2023

Self-aligned contacts

INTEL CORP0 citations62
US10037956B2Jul 31, 2018

Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same

INTEL CORP1 citations61
US8377771B2Feb 19, 2013

Recessed workfunction metal in CMOS transistor gates

INTEL CORP2 citations58
US10629483B2Apr 21, 2020

Self-aligned contacts

INTEL CORP0 citations52
US10396203B2Aug 27, 2019

Pre-sculpting of Si fin elements prior to cladding for transistor channel applications

INTEL CORP0 citations52
US10032915B2Jul 24, 2018

Non-planar transistors and methods of fabrication thereof

INTEL CORP0 citations52
US10014412B2Jul 3, 2018

Pre-sculpting of Si fin elements prior to cladding for transistor channel applications

INTEL CORP0 citations52
US9892967B2Feb 13, 2018

Self-aligned contacts

INTEL CORP0 citations52
US10770591B2Sep 8, 2020

Source/drain contacts for non-planar transistors

INTEL CORP0 citations51
US10283640B2May 7, 2019

Source/drain contacts for non-planar transistors

INTEL CORP0 citations51
US10403626B2Sep 3, 2019

Fin sculpting and cladding during replacement gate process for transistor channel applications

INTEL CORP0 citations42

BOHR MARK T

3 patents

RACHMADY WILLY

1 patent

PRADHAN SAMEER S

1 patent

JOSHI SUBHASH M

1 patent

DATTA MADHAV

1 patent