Inventor

LEHR MATTHIAS

DE63 patents

⚠️ This page may combine multiple inventors who share the name “LEHR MATTHIAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEHR MATTHIAS

ADVANCED MICRO DEVICES INC

Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device

Etch stop layer for a metallization layer with enhanced adhesion, etch selectivity and hermeticity

Technique for forming contact insulation layers and silicide regions with different characteristics

Method and semiconductor structure for monitoring the fabrication of interconnect structures and contacts in a semiconductor device

Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability

Semiconductor substrate thinning method for manufacturing thinned die

Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same

Method of patterning a low-k dielectric using a hard mask

Method and semiconductor structure for monitoring etch characteristics during fabrication of vias of interconnect structures

Method of forming an insulating capping layer for a copper metallization layer by using a silane reaction

Etch stop layer for a metallization layer with enhanced etch selectivity and hermeticity

Technique for enhancing thermal and mechanical characteristics of an underfill material of a substrate/die assembly

Technique for forming a copper-based contact layer without a terminal metal

Semiconductor device including a reduced stress configuration for metal pillars

Method of forming an insulating capping layer for a copper metallization layer

LEHR MATTHIAS

Transport of customer flexibility changes in a multi-tenant environment

Transport of customer flexibility changes in a multi-tenant environment

Propagating business object extension fields from source to target

Method of forming an alloy in an interconnect structure to increase electromigration resistance

Semiconductor device comprising a die seal having an integrated alignment mark

Semiconductor device including a die region designed for aluminum-free solder bump connection and a test structure designed for aluminum-free wire bonding

Integrated circuits with metal-insulator-metal (MIM) capacitors and methods for fabricating same

Method and device for fabricating bonding wires on the basis of microelectronic manufacturing techniques

Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protection layer

Method and semiconductor structure for monitoring etch characteristics during fabrication of vias of interconnect structures

GLOBALFOUNDRIES INC

Reduced wafer warpage in semiconductors by stress engineering in the metallization system

Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protective layer

Semiconductor device including a vertical decoupling capacitor

Method and test structure for monitoring CMP processes in metallization layers of semiconductor devices

Semiconductor device with improved metal pillar configuration

Semiconductor device comprising a die seal including long via lines

Semiconductor device comprising a die seal including long via lines

Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition

INFINEON TECHNOLOGIES AG

Method for fabricating an integrated circuit, in particular an antifuse

Method of producing alignment marks

Method for producing an antifuse and antifuse for the selective electrical connection of adjacent conductive regions

Method of fabricating a dielectric antifuse structure

Method for fabricating a wiring plane on a semiconductor chip with an antifuse

Method for improving the quality of metal conductor tracks on semiconductor structures

SCHLARB UWE

Field extensibility using generic boxed components

Stable anchors in user interface to support life cycle extensions

Facilitation of extension field usage based on reference field usage

MERCKLE GMBH

Acylpyrroledicarboxylic acids and acylindoledicarboxylic acids and their derivatives as inhibitors of cytosolic phospholipase A2

Substituted pyrrole compounds and use thereof in pharmaceutical compositions

GEISLER HOLM

Assessing metal stack integrity in sophisticated semiconductor devices by mechanically stressing die contacts

GRILLBERGER MICHAEL

Stress reduction in chip packaging by using a low-temperature chip-package connection regime

BOEMMELS JUERGEN

Semiconductor device having a grain orientation layer

SAP SE

Edge configuration of software systems for manufacturing

WALTER AXEL

Method of forming a semiconductor device including a stress buffer material formed above a low-k metallization system

VOITH PATENT GMBH

Method for controlling a hydrodynamic machine and hydrodynamic machine