Inventor

SPESSOT ALESSIO

BE19 patents

⚠️ This page may combine multiple inventors who share the name “SPESSOT ALESSIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SPESSOT ALESSIO

IMEC VZW

Method of cointegrating semiconductor structures for different voltage transistors

Memory devices based on ferroelectric field effect transistors

Semiconductor devices and methods of manufacturing semiconductor devices

System and method of simulating aging in device circuits

Memory selector and memory device including same

Integrated electronic circuit with airgaps

Transistor device with reduced hot carrier injection effect

Restoring OFF-state stress degradation of threshold voltage

MICRON TECHNOLOGY INC

Methods, devices and systems using over-reset state in a memory cell

Methods, articles, and devices for pulse adjustment to program a memory cell

Methods, articles, and devices for pulse adjustment to program a memory cell

Methods, articles and devices for pulse adjustments to program a memory cell

Methods, articles, and devices for pulse adjustments to program a memory cell

SPESSOT ALESSIO

Methods, articles and devices for pulse adjustments to program a memory cell

Methods, devices and systems using over-reset state in a memory cell

Self-check calibration of program or erase and verify process using memory cell distribution

IMEC

Method for tuning the effective work function of a gate structure in a semiconductor device

Method for manufacturing a dual work function semiconductor device

ESCH FRIEDRICH

Method for driving a scanning probe microscope at elevated scan frequencies