Inventor
STANISAVLJEVIC MILOS
CH27 patents
Patents
27 patentsUS9520189B1Dec 13, 2016
Enhanced temperature compensation for resistive memory cell circuits
IBM13 citations84
US9343148B2May 17, 2016
Method and apparatus for faster determination of a cell state of a resistive memory cell using a parallel resistor
IBM8 citations84
US11146293B2Oct 12, 2021
System and method for optimizing Reed-Solomon decoder for errors and erasures
IBM6 citations73
US9666273B2May 30, 2017
Determining a cell state of a resistive memory cell
IBM4 citations73
US11238295B2Feb 1, 2022
Distributed processing of a digital image
IBM3 citations72
US10754921B2Aug 25, 2020
Resistive memory device with scalable resistance to store weights
IBM2 citations72
US9496031B2Nov 15, 2016
Method and apparatus for faster determination of a cell state of a resistive memory cell using a parallel resistor
IBM1 citations63
US12547913B2Feb 10, 2026
Decision tree training and inference with mixed precision
IBM0 citations62
US12456043B2Oct 28, 2025
Two-dimensional mesh for compute-in-memory accelerator architecture
IBM0 citations62
US10395734B2Aug 27, 2019
Method and apparatus for determining a cell state of a resistive memory cell
IBM1 citations62
US10997084B2May 4, 2021
Virtual to physical translation and media repair in storage class memory
IBM0 citations60
US11621078B2Apr 4, 2023
Pre-processing whole slide images in cognitive medical pipelines
IBM0 citations57
US12541572B2Feb 3, 2026
Accelerating decision tree inferences based on complementary tensor operation sets
IBM0 citations52
US11474920B2Oct 18, 2022
Dynamic mapping of logical to physical memory for increased performance
IBM0 citations52
US10176867B2Jan 8, 2019
Estimation of level-thresholds for memory cells
IBM0 citations52
US10042699B2Aug 7, 2018
Multi-chip device and method for storing data
IBM0 citations52
US9953706B2Apr 24, 2018
Method and apparatus for faster determination of cell state of a resistive memory cell using a parallel resistor
IBM0 citations52
US9891988B2Feb 13, 2018
Device and method for storing data in a plurality of multi-level cell memory chips
IBM1 citations52
US9865340B2Jan 9, 2018
Enhanced temperature compensation for resistive memory cell circuits
IBM0 citations52
US9672921B2Jun 6, 2017
Device and method for storing data in a plurality of multi-level cell memory chips
IBM0 citations52
US9583184B2Feb 28, 2017
Estimation of level-thresholds for memory cells
IBM1 citations52
US12462201B2Nov 4, 2025
Dynamically optimizing decision tree inferences
IBM0 citations51
US12045612B2Jul 23, 2024
Special-purpose digital-compute hardware for efficient element-wise aggregation, scaling and offset
IBM0 citations51
US10896242B2Jan 19, 2021
Resistive memory device for matrix-vector multiplications
IBM0 citations51
US12093802B2Sep 17, 2024
Gated unit for a gated recurrent neural network
IBM0 citations50
US10268949B2Apr 23, 2019
Artificial neuron apparatus
IBM0 citations42
US10826538B1Nov 3, 2020
Efficient error correction of codewords encoded by binary symmetry-invariant product codes
IBM0 citations34