Inventor

ORIMOTO TAKASHI

US44 patents

⚠️ This page may combine multiple inventors who share the name “ORIMOTO TAKASHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ORIMOTO TAKASHI

SANDISK CORP

Methods of forming integrated circuit devices using composite spacer structures

Methods of forming NAND flash memory with fixed charge

Composite charge storage structure formation in non-volatile memory using etch stop technologies

Methods of fabricating non-volatile memory with integrated select and peripheral circuitry and post-isolation memory cell formation

Methods of fabricating non-volatile memory with integrated peripheral circuitry and pre-isolation memory cell formation

Methods of forming NAND memory with virtual channel

Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer

Non-volatile memory arrays having dual control gate cell structures and a thick control gate dielectric and methods of forming

Integrated non-volatile memory and peripheral circuitry fabrication

Methods of forming spacer patterns using assist layer for high density semiconductor devices

NAND memory with virtual channel

Spacer patterns using assist layer for high density semiconductor devices

Composite charge storage structure formation in non-volatile memory using etch stop technologies

Non-volatile memory with sidewall channels and raised source/drain regions

Non-volatile memory fabrication and isolation for composite charge storage structures

Lithographically space-defined charge storage regions in non-volatile memory

Spacer patterns using assist layer for high density semiconductor devices

NAND flash memory with fixed charge

CASIO COMPUTER CO LTD

Information providing systems and portable electronic devices

Reset circuit of electronic device

Electronic device having ferroelectric memory

Data communication system and portable data processing terminal used therein

Video game apparatus allowing for a variation in playing sequence

PURAYATH VINOD ROBERT

Method of forming memory with floating gates including self-aligned metal nanodots using a polymer solution

Damascene method of making a nonvolatile memory device

Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer

Damascene method of making a nonvolatile memory device

Method for forming self-aligned dielectric cap above floating gate

SANDISK TECHNOLOGIES LLC

Method of making a three-dimensional memory device using a multi-step hot phosphoric acid wet etch process

Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same

Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same

SANDISK TECHNOLOGIES INC

Integrated nanostructure-based non-volatile memory fabrication

Integrated nanostructure-based non-volatile memory fabrication

Methods of forming NAND flash memory with fixed charge

MATAMIS GEORGE

Self-aligned three-dimensional non-volatile memory fabrication

Methods of forming high density semiconductor devices using recursive spacer technique

SPANSION LLC

Method for forming memory array bitlines comprising epitaxially grown silicon and related structure

Memory cell having combination raised source and drain and method of fabricating same

TOYOTA MOTOR CO LTD

Vehicle backward movement detection apparatus and vehicle braking force control apparatus

FANG SHENQING

Memory cell system with charge trap

ORIMOTO TAKASHI

Enhanced endpoint detection in non-volatile memory fabrication processes

PSIQUANTUM CORP

Structure and method to remove semiconductor chip material for optical signal access to a photonic chip

DING MENG

Memory cell system with charge trap

PACIFIC BIOSCIENCES CALIFORNIA INC

Packaging methods for fabrication of analytical device packages and analytical device packages made thereof