Inventor

CHIEN HENRY

US80 patents

⚠️ This page may combine multiple inventors who share the name “CHIEN HENRY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHIEN HENRY

SANDISK TECHNOLOGIES INC

Three-dimensional memory device containing source select gate electrodes with enhanced electrical isolation

Three-dimensional memory device containing CMOS devices over memory stack structures

Multi tier three-dimensional memory devices including vertically shared bit lines

Method of making a vertical NAND device using a sacrificial layer with air gap and sequential etching of multilayer stacks

Three dimensional NAND string memory devices with voids enclosed between control gate electrodes

Three dimensional NAND device with birds beak containing floating gates and method of making thereof

Multilevel memory stack structure and methods of manufacturing the same

Methods of selective removal of blocking dielectric in NAND memory strings

Method of making a vertical NAND device using sequential etching of multilayer stacks

Three dimensional NAND device with silicide containing floating gates

Vertical NAND and method of making thereof using sequential stack etching and landing pad

Ultrahigh density vertical NAND memory device and method of making thereof

Multi-tier replacement memory stack structure integration scheme

3D semicircular vertical NAND string with self aligned floating gate or charge trap cell memory cells and methods of fabricating and operating the same

Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material

3D semicircular vertical NAND string with self aligned floating gate or charge trap cell memory cells and methods of fabricating and operating the same

Method of integrating select gate source and memory hole for three-dimensional non-volatile memory device

Method of making a vertical NAND device using sequential etching of multilayer stacks

Three dimensional NAND device with silicide containing floating gates and method of making thereof

Method of forming an active area with floating gate negative offset profile in FG NAND memory

Three-dimensional memory devices having a single layer channel and methods of making thereof

Vertical NAND and method of making thereof using sequential stack etching and landing pad

Integrated nanostructure-based non-volatile memory fabrication

Three dimensional vertical NAND device with floating gates

Crystalline layer stack for forming conductive layers in a three-dimensional memory structure

Forming 3D memory cells after word line replacement

Non-volatile memory with flat cell structures and air gap isolation

High stack 3D memory and method of making

SANDISK CORP

Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND

Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with sidewall spacers

Non-volatile memory cells utilizing substrate trenches

Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers

Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND

Method of patterning polysilicon layers on substrate

Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers

Methods of forming integrated circuit devices using composite spacer structures

Methods of forming NAND flash memory with fixed charge

Self-aligned non-volatile memory cell

Methods of forming NAND memory with virtual channel

Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND

Self aligned non-volatile memory cell and process for fabrication

Methods of reducing coupling between floating gates in nonvolatile memory

ALSMEIER JOHANN

Ultrahigh density vertical NAND memory device and method of making thereof

Ultrahigh density monolithic three dimensional vertical NAND string memory device and method of making thereof

SANDISK TECHNOLOGIES LLC

Stacked vertical memory array architectures, systems and methods

Multilevel memory stack structure and methods of manufacturing the same

SANDISK 3D LLC

Memories with cylindrical read/write stacks

PURAYATH VINOD ROBERT

Metal control gate structures and air gap isolation in non-volatile memory

MATAMIS GEORGE

Self-aligned three-dimensional non-volatile memory fabrication

MONSANTO TECHNOLOGY LLC

Reaction systems for making N-(phosphonomethyl) glycine compounds