Inventor

SIM JAE-SUNG

KR30 patents

⚠️ This page may combine multiple inventors who share the name “SIM JAE-SUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SIM JAE-SUNG

SAMSUNG ELECTRONICS CO LTD

Integrated circuit memory devices having vertically arranged strings of memory cells therein and methods of operating same

Memory devices including vertical pillars and methods of manufacturing and operating the same

Semiconductor memory device with memory cells on multiple layers

Charge-trap type non-volatile memory devices and related methods

Memory devices including vertical pillars and methods of manufacturing and operating the same

Vertical semiconductor devices and methods of manufacturing the same

Method of operating nonvolatile memory device

Semiconductor device with charge storage pattern and method for fabricating the same

Methods of forming charge-trap type non-volatile memory devices

Charge-trap nonvolatile memory devices

Vertical semiconductor devices and methods of manufacturing the same

Vertical semiconductor devices and methods of manufacturing the same

SAMSUNG ELECTRO MECH

Electronic component embedded substrate

Substrate-embedded electronic component

Board having electronic component embedded therein

Printed circuit board

Printed circuit board and method of manufacturing the same

Printed circuit board

Connection structure embedded substrate

LG ELECTRONICS INC

Dual capacity compressor

Refrigerator

Dual capacity compressor

SK HYNIX INC

Semiconductor memory device and method of operating the semiconductor memory device

Semiconductor memory device and method of operating the semiconductor memory device

Memory device for performing program verify operation and method of operating the same

SIM JAE-SUNG

Memory devices including vertical pillars and methods of manufacturing and operating the same

Integrated circuit memory devices having vertically arranged strings of memory cells therein and methods of operating same

YUN SUNG-WON

Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof

SEOUL NAT UNIV IND FOUNDATION

Charge trap memory with avalanche generation inducing layer

PARK YOUNG-WOO

Methods for fabricating semiconductor devices with charge storage patterns