P

Inventor

Lin kevin l

US44 patents
⚠️ This page may combine multiple inventors who share the name “Lin kevin l”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

40 patents
US10892223B2Jan 12, 2021

Advanced lithography and self-assembled devices

INTEL CORP11 citations86
US9489928B2Nov 8, 2016

Adjustment of monitor resolution and pixel refreshment based on detected viewer distance

INTEL CORP8 citations82
US12218052B2Feb 4, 2025

Advanced lithography and self-assembled devices

INTEL CORP1 citations75
US11854787B2Dec 26, 2023

Advanced lithography and self-assembled devices

INTEL CORP1 citations73
US11373950B2Jun 28, 2022

Advanced lithography and self-assembled devices

INTEL CORP1 citations73
US11335777B2May 17, 2022

Integrated circuit components with substrate cavities

INTEL CORP2 citations73
US11011463B2May 18, 2021

Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication and structures resulting therefrom

INTEL CORP3 citations73
US10615117B2Apr 7, 2020

Self-aligned via

INTEL CORP4 citations73
US11137681B2Oct 5, 2021

Lined photobucket structure for back end of line (BEOL) interconnect formation

INTEL CORP2 citations72
US11462469B2Oct 4, 2022

Single mask lithography line end enhancement

INTEL CORP2 citations71
US9824642B2Nov 21, 2017

Rendering techniques for textured displays

INTEL CORP2 citations71
US11328992B2May 10, 2022

Integrated circuit components with dummy structures

INTEL CORP4 citations68
US12107044B2Oct 1, 2024

Metal oxycarbide resists as leave behind plugs

INTEL CORP0 citations62
US12002754B2Jun 4, 2024

Multi-height and multi-width interconnect line metallization for integrated circuit structures

INTEL CORP0 citations62
US11990403B2May 21, 2024

Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication and structures resulting therefrom

INTEL CORP0 citations62
US11955377B2Apr 9, 2024

Differential hardmasks for modulation of electrobucket sensitivity

INTEL CORP0 citations62
US11769814B2Sep 26, 2023

Device including air gapping of gate spacers and other dielectrics and process for providing such

INTEL CORP0 citations62
US11616014B2Mar 28, 2023

Peripheral inductors

INTEL CORP0 citations62
US11594485B2Feb 28, 2023

Local interconnect with air gap

INTEL CORP0 citations62
US11251072B2Feb 15, 2022

Differential hardmasks for modulation of electrobucket sensitivity

INTEL CORP0 citations62
US10892184B2Jan 12, 2021

Photobucket floor colors with selective grafting

INTEL CORP0 citations62
US10886175B2Jan 5, 2021

Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom

INTEL CORP0 citations62
US10546772B2Jan 28, 2020

Self-aligned via below subtractively patterned interconnect

INTEL CORP1 citations62
US12506059B2Dec 23, 2025

Vertically spaced intra-level interconnect line metallization for integrated circuit devices

INTEL CORP0 citations61
US11953826B2Apr 9, 2024

Lined photobucket structure for back end of line (BEOL) interconnect formation

INTEL CORP0 citations61
US11948874B2Apr 2, 2024

Vertically spaced intra-level interconnect line metallization for integrated circuit devices

INTEL CORP0 citations61
US11024538B2Jun 1, 2021

Hardened plug for improved shorting margin

INTEL CORP0 citations61
US12588493B2Mar 24, 2026

Metal spacers with hard masks formed using a subtractive process

INTEL CORP0 citations60
US11626451B2Apr 11, 2023

Magnetic memory device with ruthenium diffusion barrier

INTEL CORP0 citations60
US12156473B2Nov 26, 2024

Inductor/core assemblies for integrated circuits

INTEL CORP0 citations59
US11189790B2Nov 30, 2021

Spacer-based patterning for tight-pitch and low-variability random access memory (RAM) bit cells and the resulting structures

INTEL CORP0 citations58
US11784121B2Oct 10, 2023

Integrated circuit components with dummy structures

INTEL CORP0 citations57
US12581857B2Mar 17, 2026

Integrated thermoelectric device to mitigate integrated circuit hot spots

INTEL CORP0 citations52
US11670588B2Jun 6, 2023

Selectable vias for back end of line interconnects

INTEL CORP0 citations52
US11011481B2May 18, 2021

Configurable resistor

INTEL CORP0 citations52
US10796909B2Oct 6, 2020

Surface-aligned lithographic patterning approaches for back end of line (BEOL) interconnect fabrication

INTEL CORP0 citations52
US10508961B2Dec 17, 2019

Semiconductor package with air pressure sensor

INTEL CORP0 citations52
US9324652B2Apr 26, 2016

Method of creating a maskless air gap in back end interconnections with double self-aligned vias

INTEL CORP1 citations51
US12412838B2Sep 9, 2025

Integrated circuit structure with filled recesses

INTEL CORP0 citations48
US10643946B2May 5, 2020

Nitrogen assisted oxide gapfill

INTEL CORP0 citations39

Lin kevin l

2 patents

TEH WENG HONG

1 patent

CHANDHOK MANISH

1 patent