Inventor

ONISHI KATSUNORI

JP25 patents

⚠️ This page may combine multiple inventors who share the name “ONISHI KATSUNORI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ONISHI KATSUNORI

IBM

Forming gate oxides having multiple thicknesses

Semiconductor structure and method of forming the structure

Performance optimized gate structures having memory device and logic device, the memory device with silicided source/drain regions that are raised with respect to silicided source/drain regions of the logic device

Low energy ion implantation of a junction butting region

Semiconductor structure and method of forming the structure

Method of forming performance optimized gate structures by silicidizing lowered source and drain regions

Method of forming performance optimized gate structures by silicidizing lowered source and drain regions

Protection of SiGe during etch and clean operations

Semiconductor device defect type determination method and structure

GLOBALFOUNDRIES INC

Integration scheme for gate height control and void free RMG fill

Method for forming a protection device having an inner contact spacer and the resulting devices

Integration scheme for gate height control and void free RMG fill

Asymmetric stressor DRAM

Cut inside replacement metal gate trench to mitigate N-P proximity effect

Cut inside replacement metal gate trench to mitigate N-P proximity effect

Short channel and long channel devices

FUNAI ELECTRIC CO

Magnetic tape cassette with fail-safe inserting apparatus

Loading mechanism for a video cassette

Optical disc apparatus

Disk apparatus

Recording-medium mis-recording preventing mechanism

Device for securing a part to a chassis

INOUE MTP KK

Apparatus for winding a sheet-formed article

MACRONIX INT CO LTD

Non-volatile semiconductor memory device programmable and erasable at low voltage

BUILDING SYSTEM DESIGN CO LTD

Joint structure for H-beam