Inventor

DU YUN

US62 patents

⚠️ This page may combine multiple inventors who share the name “DU YUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DU YUN

QUALCOMM INC

Graphics processors with parallel scheduling and execution of threads

Graphics processing unit with unified vertex cache and shader register file

On-demand multi-thread multimedia processor

Per-instance preamble for graphics processing

Per-shader preamble for graphics processing

Server-based code compilation

Tiled cache for multiple software programs

Programmable blending in a graphics processing unit

Relative address generation

Deferred GPR allocation for texture/load instruction block

Load scheme for shared register in GPU

Graphics instruction operands alias

Scheme for varying packing and linking in graphics systems

Multi-stage floating-point accumulator

GPR optimization in a GPU based on a GPR release mechanism

GPR optimization in a GPU based on a GPR release mechanism

Methods and apparatus for wave slot management

Performing matrix multiplication in a streaming processor

Fast incremental shared constants

Dynamic wave pairing

Methods and apparatus to perform matrix multiplication in a streaming processor

Fast incremental shared constants

Out of order wave slot release for a terminated wave

Graphics processing unit with shared arithmetic logic unit

Run-time mechanism for optimal shader

Methods and apparatus to facilitate a dedicated bindless state processor

Techniques for serialized execution in a SIMD processing system

Methods and apparatus for constant data storage

Utilizing pipeline registers as intermediate storage

DU YUN

Multi-threaded processor with deferred thread output control

Programmable streaming processor with mixed precision instruction execution

Processor with adaptive multi-shader

Unified virtual addressed register file

Demand based power control in a graphics processing unit

Dependent instruction thread scheduling

Graphics processor with arithmetic and elementary function units

JIAO GUOFANG

3-D clipping in a graphics processing unit

Efficient 2-D and 3-D graphics processing

Convolution filtering in a graphics processor

Graphics processing unit with deferred vertex shading

Fragment shader bypass in a graphics processing unit, and apparatus and method thereof

3-D clipping in a graphics processing unit

SAMBANOVA SYSTEMS INC

Low latency nodes fusion in a reconfigurable data processor

Graph spatial split

CHEN LIN

Selectively activating a resume check operation in a multi-threaded processing system

RAO HARI

Dynamic power saving memory architecture

HEFEI BOE OPTOELECTRONICS TECH

Grating adjusting apparatus and 3D display apparatus

YU CHUN

Graphics system with configurable caches

SHENZHEN DUYUN TECH CO LTD

Double-ended brush

HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTD

Touch control display substrate, touch control display device, and touch control signal line distribution method