Inventor

CHRISTENSEN TODD A

US47 patents

⚠️ This page may combine multiple inventors who share the name “CHRISTENSEN TODD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHRISTENSEN TODD A

IBM

High-density integrated circuit via capacitor

Power management SRAM write bit line drive circuit

Power management domino SRAM bit line discharge circuit

Column selectable self-biasing virtual voltages for SRAM write assist

Method and apparatus for multi-word write in domino read SRAMs

Implementing eFuse visual security of stored data using EDRAM

Implementing eFuse visual security of stored data using EDRAM

Decoupling capacitor using finFET topology

Memory interface latch with integrated write-through and fence functions

Memory interface latch with integrated write-through function

High-density integrated circuit via capacitor

Partial update in a ternary content addressable memory

Data security for dynamic random access memory using body bias to clear data at power-up

Method and apparatus to limit circuit delay dependence on voltage for single phase transition

Method and apparatus to limit circuit delay dependence on voltage

Memory interface latch with integrated write-through and fence functions

Apparatus for and method of current leakage reduction in static random access memory arrays

Processor chip timing adjustment enhancement

Implementing eFuse visual security of stored data using EDRAM

Enhancing performance of one or more slower partitions of an integrated circuit to improve performance of the integrated circuit

Electrostatic discharge protection device with power management

Electrostatic discharge protection device with power management

Level shifter for a time-varying input

Level shifter for a time-varying input

Partial update in a ternary content addressable memory

Integrated decoupling capacitor utilizing through-silicon via

Integrated decoupling capacitor utilizing through-silicon via

Detecting maximum voltage between multiple power supplies for memory testing

Implementing enhanced performance dynamic evaluation circuit by combining precharge and delayed keeper

Implementing enhanced performance dynamic evaluation circuit by combining precharge and delayed keeper

Layout to minimize FET variation in small dimension photolithography

Apparatus for guaranteed write through in domino read SRAM&#39;s

Integrated shielding and decoupling capacitor structure

FinFET power supply decoupling

On-chip diagnostic circuitry monitoring multiple cycles of signal samples

BEHRENDS DERICK G

Implementing mulitple mask lithography timing variation mitigation

Data dependent SRAM write assist

Implementing power saving self powering down latch structure

Implementing RC and coupling delay correction for SRAM

Data security for dynamic random access memory at power-up

Implementing single bit redundancy for dynamic SRAM circuit with any bit decode

Single cycle data copy for two-port SRAM

CHRISTENSEN TODD A

Mask alignment, rotation and bias monitor utilizing threshold voltage dependence

Method for selectable guaranteed write-through with early read suppression

BARTLEY GERALD K

Doped implant monitoring for microchip tamper detection

ADAMS CHAD A

High-speed testing of integrated devices

AIPPERSPACH ANTHONY G

Implementing integrated circuit mixed double density and high performance wire structure

Apparatus for guaranteed write through in domino read SRAM's