Inventor
PANG CHAN-SUI
US11 patents
⚠️ This page may combine multiple inventors who share the name “PANG CHAN-SUI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK CORP
3 patentsUS7450433B2Nov 11, 2008
Word line compensation in non-volatile memory erase operations
SANDISK CORP63 citations98
US7606074B2Oct 20, 2009
Word line compensation in non-volatile memory erase operations
SANDISK CORP44 citations96
US7057931B2Jun 6, 2006
Flash memory programming using gate induced junction leakage current
SANDISK CORP47 citations92
CATALYST SEMICONDUCTOR INC
2 patentsUS4894802AJan 16, 1990
Nonvolatile memory cell for eeprom including a floating gate to drain tunnel area positioned away from the channel region to prevent trapping of electrons in the gate oxide during cell erase
CATALYST SEMICONDUCTOR INC28 citations92
US5033023AJul 16, 1991
High density EEPROM cell and process for making the cell
CATALYST SEMICONDUCTOR INC51 citations89
(unassigned)
2 patentsBRIGHT MICROELECTRONICS INC
2 patentsUS5986941ANov 16, 1999
Programming current limiter for source-side injection EEPROM cells
BRIGHT MICROELECTRONICS INC32 citations91
US5663907ASep 2, 1997
Switch driver circuit for providing small sector sizes for negative gate erase flash EEPROMS using a standard twin-well CMOS process
BRIGHT MICROELECTRONICS INC77 citations91