P

Inventor

STOLLER HERBERT I

US23 patents
⚠️ This page may combine multiple inventors who share the name “STOLLER HERBERT I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

21 patents
US6072690AJun 6, 2000

High k dielectric capacitor with low k sheathed signal vias

IBM152 citations99
US6878608B2Apr 12, 2005

Method of manufacture of silicon based package

IBM54 citations96
US6023407AFeb 8, 2000

Structure for a thin film multilayer capacitor

IBM80 citations96
US6037044AMar 14, 2000

Direct deposit thin film single/multi chip module

IBM68 citations95
US5635761AJun 3, 1997

Internal resistor termination in multi-chip module environments

IBM57 citations95
US4688151AAug 18, 1987

Multilayered interposer board for powering high current chip modules

IBM119 citations95
US7189595B2Mar 13, 2007

Method of manufacture of silicon based package and devices manufactured thereby

IBM21 citations92
US6430030B2Aug 6, 2002

High k dielectric material with low k dielectric sheathed signal vias

IBM34 citations92
US6392896B1May 21, 2002

Semiconductor package containing multiple memory units

IBM24 citations92
US6216324B1Apr 17, 2001

Method for a thin film multilayer capacitor

IBM37 citations92
US6200400B1Mar 13, 2001

Method for making high k dielectric material with low k dielectric sheathed signal vias

IBM34 citations92
US5243140ASep 7, 1993

Direct distribution repair and engineering change system

IBM33 citations92
US6261467B1Jul 17, 2001

Direct deposit thin film single/multi chip module

IBM26 citations91
US7855442B2Dec 21, 2010

Silicon based package

IBM10 citations84
US6713686B2Mar 30, 2004

Apparatus and method for repairing electronic packages

IBM16 citations84
US7193318B2Mar 20, 2007

Multiple power density chip structure

IBM18 citations83
US4535388AAug 13, 1985

High density wired module

IBM16 citations73
US4252581AFeb 24, 1981

Selective epitaxy method for making filamentary pedestal transistor

IBM19 citations73
US4546413AOct 8, 1985

Engineering change facility on both major surfaces of chip module

IBM13 citations72
US6762489B2Jul 13, 2004

Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules

IBM12 citations68
US6974722B2Dec 13, 2005

Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules

IBM4 citations57

GROBMAN WARREN D

1 patent

MAGERLEIN JOHN H

1 patent