Inventor

LI JUNJUN

US142 patents

⚠️ This page may combine multiple inventors who share the name “LI JUNJUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LI JUNJUN

IBM

Design structures for high-voltage integrated circuits

Structure and method for an electrostatic discharge (ESD) silicon controlled rectifier (SCR) structure

Stacked power clamp having a BigFET gate pull-up circuit

ESD protection power clamp for suppressing ESD events occurring on power supply terminals

Tamper-respondent assembly with structural material within sealed inner compartment

Electrostatic discharge devices and methods of manufacture

Electrostatic discharge devices and methods of manufacture

Electrostatic discharge devices and methods of manufacture

SCR with fin body regions for ESD protection

Dual three-dimensional (3D) resistor and methods of forming

FinFET device technology with LDMOS structures for high voltage operations

Silicon controlled rectifier with integral deep trench capacitor

Silicon controlled rectifier with integral deep trench capacitor

Bi-directional back-to-back stacked SCR for high-voltage pin ESD protection, methods of manufacture and design structures

Electrostatic discharge (ESD) silicon controlled rectifier (SCR) structure

Structure for a stacked power clamp having a BigFET gate pull-up circuit

Structure and method for a silicon controlled rectifier (SCR) structure for SOI technology

Apparatus and method for improved triggering and leakage current control of ESD clamping devices

Semiconductor structure with deep trench thermal conduction

High performance e-fuse fabricated with sub-lithographic dimension

Structure and circuit technique for uniform triggering of multifinger semiconductor devices with tunable trigger voltage

Design structure for uniform triggering of multifinger semiconductor devices with tunable trigger voltage

Apparatus and method for improved triggering and oscillation suppression of ESD clamping devices

Semiconductor device heat dissipation structure

RC-triggered power clamp suppressing negative mode electrostatic discharge stress

Methods, design structures, and systems for current mode logic (CML) differential driver ESD protection circuitry

Electrostatic discharge power clamp with fail-safe design

Electrostatic discharge device with fail-safe design

Electrostatic discharge devices and methods of manufacture

Electrostatic discharge power clamp with fail-safe design

Passive devices for FinFET integrated circuit technologies

Bulk FinFET ESD device

ABOU-KHALIL MICHEL J

Metal-insulator-metal capacitors with high capacitance density

RC-triggered semiconductor controlled rectifier for ESD protection of signal pads

Structures, methods and applications for electrical pulse anneal processes

Semiconductor structures with thinned junctions and methods of manufacture

Programmable electrical fuse

Low leakage, low capacitance electrostatic discharge (ESD) silicon controlled recitifer (SCR), methods of manufacture and design structure

APPLE INC

Electrostatic discharge (ESD) silicon controlled rectifier (SCR) with lateral gated section

Electrostatic discharge (ESD) diode in FinFET technology

Electrostatic discharge network for driver gate protection

GLOBALFOUNDRIES INC

Nanowire structure with selected stack removed for reduced gate resistance and method of fabricating same

Multi-gate field effect transistor (FET) including isolated fin body

Electrostatic discharge protection circuit with a fail-safe mechanism

TWITTER INC

Method and system for identifying users across mobile and desktop devices

Unidirectional lookalike campaigns in a messaging platform

CLARK JR WILLIAM F

Passive devices for FinFET integrated circuit technologies

Passive devices for FinFET integrated circuit technologies

CAMPI JR JOHN B

Robust ESD protection circuit, method and design structure for tolerant and failsafe designs

Vertical NPNP structure in a triple well CMOS process