Inventor

KITAI KATSUYOSHI

JP26 patents

Patents

26 patents

US6081826AJun 27, 2000

System using environment manager with resource table in each computer for managing distributed computing resources managed for each application

HITACHI LTD111 citations98

US5948069ASep 7, 1999

Networking system and parallel networking method

HITACHI LTD119 citations98

US6470391B2Oct 22, 2002

Method for transmitting data via a network in a form of divided sub-packets

HITACHI LTD57 citations96

US5903724AMay 11, 1999

Method of transferring packet data in a network by transmitting divided data packets

HITACHI LTD83 citations96

US5606686AFeb 25, 1997

Access control method for a shared main memory in a multiprocessor based upon a directory held at a storage location of data in the memory after reading data to a processor

HITACHI LTD90 citations96

US5590353ADec 31, 1996

Vector processor adopting a memory skewing scheme for preventing degradation of access performance

HITACHI LTD82 citations96

US5440750AAug 8, 1995

Information processing system capable of executing a single instruction for watching and waiting for writing of information for synchronization by another processor

HITACHI LTD59 citations96

US5109499AApr 28, 1992

Vector multiprocessor system which individually indicates the data element stored in common vector register

HITACHI LTD115 citations96

US6404766B1Jun 11, 2002

Network data communication system

HITACHI LTD63 citations95

US6112248AAug 29, 2000

Method and system for dynamically balancing network traffic using address resolution protocol

HITACHI LTD70 citations95

US5857110AJan 5, 1999

Priority control with concurrent switching of priorities of vector processors, for plural priority circuits for memory modules shared by the vector processors

HITACHI LTD52 citations95

US5774731AJun 30, 1998

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

HITACHI LTD63 citations95

US6502136B1Dec 31, 2002

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

HITACHI LTD37 citations92

US6449631B1Sep 10, 2002

Method and apparatus for transmitting data in a network wherein acknowledgment signals are transmitted to acknowledge receipt of data

HITACHI LTD23 citations92

US6330604B1Dec 11, 2001

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

HITACHI LTD24 citations92

US5617575AApr 1, 1997

Interprocessor priority control system for multivector processor

HITACHI LTD36 citations92

US5530881AJun 25, 1996

Vector processing apparatus for processing different instruction set architectures corresponding to mingled-type programs and separate-type programs

HITACHI LTD34 citations92

US5392443AFeb 21, 1995

Vector processor with a memory assigned with skewed addresses adapted for concurrent fetching of a number of vector elements belonging to the same vector data

HITACHI LTD41 citations92

US5339429AAug 16, 1994

Parallel processing system and compiling method used therefor

HITACHI LTD49 citations92

US5193186AMar 9, 1993

Processor system for executing processes in parallel under multitask, control method of waiting for event of process

HITACHI LTD46 citations92

US6826167B2Nov 30, 2004

Mobile communication system

HITACHI LTD14 citations81

US5506980AApr 9, 1996

Method and apparatus for parallel processing of a large data array utilizing a shared auxiliary memory

HITACHI LTD16 citations74

US5396603AMar 7, 1995

Data processor having resources and execution start control for starting execution of succeeding instruction in resource before completion of preceding instruction

HITACHI LTD8 citations73

US5432920AJul 11, 1995

KITAI KATSUYOSHI

Patents

System using environment manager with resource table in each computer for managing distributed computing resources managed for each application

Networking system and parallel networking method

Method for transmitting data via a network in a form of divided sub-packets

Method of transferring packet data in a network by transmitting divided data packets

Access control method for a shared main memory in a multiprocessor based upon a directory held at a storage location of data in the memory after reading data to a processor

Vector processor adopting a memory skewing scheme for preventing degradation of access performance

Information processing system capable of executing a single instruction for watching and waiting for writing of information for synchronization by another processor

Vector multiprocessor system which individually indicates the data element stored in common vector register

Network data communication system

Method and system for dynamically balancing network traffic using address resolution protocol

Priority control with concurrent switching of priorities of vector processors, for plural priority circuits for memory modules shared by the vector processors

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

Method and apparatus for transmitting data in a network wherein acknowledgment signals are transmitted to acknowledge receipt of data

Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage

Interprocessor priority control system for multivector processor

Vector processing apparatus for processing different instruction set architectures corresponding to mingled-type programs and separate-type programs

Vector processor with a memory assigned with skewed addresses adapted for concurrent fetching of a number of vector elements belonging to the same vector data

Parallel processing system and compiling method used therefor

Processor system for executing processes in parallel under multitask, control method of waiting for event of process

Mobile communication system

Method and apparatus for parallel processing of a large data array utilizing a shared auxiliary memory

Data processor having resources and execution start control for starting execution of succeeding instruction in resource before completion of preceding instruction

Store control method with hierarchic priority scheme for computer system

Shared computer system for selective execution of fundamental software

Network data communication system