P

Inventor

CHIEN RONG-WU

TW13 patents

Patents

13 patents
US5895740AApr 20, 1999

Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers

VANGUARD INT SEMICONDUCT CORP176 citations98
US5904154AMay 18, 1999

Method for removing fluorinated photoresist layers from semiconductor substrates

VANGUARD INT SEMICONDUCT CORP82 citations93
US6168987B1Jan 2, 2001

Method for fabricating crown-shaped capacitor structures

VANGUARD INT SEMICONDUCT CORP27 citations92
US5869383AFeb 9, 1999

High contrast, low noise alignment mark for laser trimming of redundant memory arrays

VANGUARD INT SEMICONDUCT CORP43 citations92
US5686337ANov 11, 1997

Method for fabricating stacked capacitors in a DRAM cell

VANGUARD INT SEMICONDUCT CORP54 citations92
US5643824AJul 1, 1997

Method of forming nitride sidewalls having spacer feet in a locos process

VANGUARD INT SEMICONDUCT CORP20 citations91
US6010942AJan 4, 2000

Post chemical mechanical polishing, clean procedure, used for fabrication of a crown shaped capacitor structure

VANGUARD INT SEMICONDUCT CORP40 citations88
US5702869ADec 30, 1997

Soft ashing method for removing fluorinated photoresists layers from semiconductor substrates

VANGUARD INT SEMICONDUCT CORP30 citations86
US6136688AOct 24, 2000

High stress oxide to eliminate BPSG/SiN cracking

VANGUARD INT SEMICONDUCT CORP16 citations81
US6307273B1Oct 23, 2001

High contrast, low noise alignment mark for laser trimming of redundant memory arrays

VANGUARD INT SEMICONDUCT CORP11 citations73
US5597764AJan 28, 1997

Method of contact formation and planarization for semiconductor processes

VANGUARD INT SEMICONDUCT CORP11 citations73
US6043160AMar 28, 2000

Method of manufacturing a monitor pad for chemical mechanical polishing planarization

VANGUARD INT SEMICONDUCT CORP0 citations51
US6204195B1Mar 20, 2001

Method to prevent CMP overpolish

VANGUARD INT SEMICONDUCT CORP0 citations45