P

Inventor

CHOE SWEE YEW

US27 patents

Patents

27 patents
US6972605B1Dec 6, 2005

High speed semi-dynamic flip-flop circuit

SUN MICROSYSTEMS INC18 citations83
US6906556B2Jun 14, 2005

High-speed domino logic with improved cascode keeper

SUN MICROSYSTEMS INC7 citations73
US6714059B1Mar 30, 2004

High-speed domino logic circuit

SUN MICROSYSTEMS INC10 citations73
US6496039B1Dec 17, 2002

Clocked half-rail differential logic

SUN MICROSYSTEMS INC6 citations73
US6373292B1Apr 16, 2002

Low voltage differential logic

SUN MICROSYSTEMS INC12 citations73
US7030664B2Apr 18, 2006

Half-rail differential driver circuit

SUN MICROSYSTEMS INC3 citations62
US6828826B1Dec 7, 2004

Method for clock control of half-rail differential logic

SUN MICROSYSTEMS INC2 citations62
US6717438B2Apr 6, 2004

Clocked half-rail differential logic with single-rail logic

SUN MICROSYSTEMS INC4 citations62
US6703867B1Mar 9, 2004

Clocked full-rail differential logic with sense amplifier and shut-off

SUN MICROSYSTEMS INC4 citations62
US6661257B2Dec 9, 2003

Method for clocking charge recycling differential logic

SUN MICROSYSTEMS INC4 citations62
US6639429B2Oct 28, 2003

Method for clock control of half-rail differential logic

SUN MICROSYSTEMS INC3 citations62
US6630846B2Oct 7, 2003

Modified charge recycling differential logic

SUN MICROSYSTEMS INC5 citations62
US6617882B2Sep 9, 2003

Clocked half-rail differential logic

SUN MICROSYSTEMS INC2 citations62
US6624664B2Sep 23, 2003

Clocked full-rail differential logic with sense amplifiers

SUN MICROSYSTEMS INC7 citations58
US6614264B2Sep 2, 2003

Method for increasing the load capacity of full-rail differential logic

SUN MICROSYSTEMS INC7 citations58
US6876230B2Apr 5, 2005

Synchronous clocked full-rail differential logic with single-rail logic and shut-off

SUN MICROSYSTEMS INC2 citations51
US6859072B2Feb 22, 2005

Method for clock control of clocked half-rail differential logic with sense amplifier and single-rail logic

SUN MICROSYSTEMS INC1 citations51
US6741101B1May 25, 2004

Method for clock control of clocked half-rail differential logic with single-rail logic

SUN MICROSYSTEMS INC1 citations51
US6784697B2Aug 31, 2004

Method for clock control of clocked half-rail differential logic with sense amplifier and shut-off

SUN MICROSYSTEMS INC0 citations41
US6768345B2Jul 27, 2004

Method for clock control of clocked full-rail differential logic circuits with sense amplifier and shut-off

SUN MICROSYSTEMS INC0 citations41
US6768344B2Jul 27, 2004

Clocked half-rail differential logic with single-rail logic and sense amplifier

SUN MICROSYSTEMS INC0 citations41
US6768343B2Jul 27, 2004

Clocked half-rail differential logic with sense amplifier and shut-off

SUN MICROSYSTEMS INC0 citations41
US6765415B2Jul 20, 2004

Clocked full-rail differential logic with shut-off

SUN MICROSYSTEMS INC0 citations41
US6750679B1Jun 15, 2004

Clocked full-rail differential logic with sense amplifier and single-rail logic

SUN MICROSYSTEMS INC0 citations41
US6750678B2Jun 15, 2004

Method for increasing the load capacity of clocked half-rail differential logic

SUN MICROSYSTEMS INC0 citations41
US6744283B2Jun 1, 2004

Clocked half-rail differential logic with sense amplifier

SUN MICROSYSTEMS INC0 citations41
US6737889B2May 18, 2004

Method for increasing the power efficiency and noise immunity of clocked full-rail differential logic

SUN MICROSYSTEMS INC0 citations41