Inventor
IRIE NAOHIKO
JP34 patents
⚠️ This page may combine multiple inventors who share the name “IRIE NAOHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HITACHI LTD
20 patentsUS6038644AMar 14, 2000
Multiprocessor system with partial broadcast capability of a cache coherent processing request
HITACHI LTD88 citations98
US6298418B1Oct 2, 2001
Multiprocessor system and cache coherency control method
HITACHI LTD73 citations95
US7023757B2Apr 4, 2006
Semiconductor device
HITACHI LTD26 citations93
US7340078B2Mar 4, 2008
Multi-sensing devices cooperative recognition system
HITACHI LTD45 citations92
US6728258B1Apr 27, 2004
Multi-processor system and its network
HITACHI LTD31 citations92
US6263405B1Jul 17, 2001
Multiprocessor system
HITACHI LTD46 citations92
US6011791AJan 4, 2000
Multi-processor system and its network
HITACHI LTD51 citations92
US5721865AFeb 24, 1998
Information processing apparatus with prefetch control for prefetching data structure from memory through cache memory
HITACHI LTD49 citations92
US5706465AJan 6, 1998
Computers having cache memory
HITACHI LTD22 citations92
US6772325B1Aug 3, 2004
Processor architecture and operation for exploiting improved branch control instruction
HITACHI LTD33 citations91
US6374348B1Apr 16, 2002
Prioritized pre-fetch/preload mechanism for loading and speculative preloading of candidate branch target instruction
HITACHI LTD18 citations91
US7829930B2Nov 9, 2010
Semiconductor device with ion movement control
HITACHI LTD10 citations84
US7146513B2Dec 5, 2006
System for adjusting a clock frequency based on comparing a required process times and a worst case execution times and adjusting a voltage and clock frequency based on a number of ready state application tasks
HITACHI LTD12 citations82
US6449712B1Sep 10, 2002
Emulating execution of smaller fixed-length branch/delay slot instructions with a sequence of larger fixed-length instructions
HITACHI LTD18 citations81
US7149910B2Dec 12, 2006
Apparatus for processing a set of instructions initially at a low speed for a predetermined time then processing the set of instructions at a higher speed until completion
HITACHI LTD10 citations74
US6393523B1May 21, 2002
Mechanism for invalidating instruction cache blocks in a pipeline processor
HITACHI LTD11 citations71
US7206818B2Apr 17, 2007
Shared memory multiprocessor system
HITACHI LTD4 citations62
US7254082B2Aug 7, 2007
Semiconductor device
HITACHI LTD1 citations52
US7454216B2Nov 18, 2008
in-facility information provision system and in-facility information provision method
HITACHI LTD0 citations39
US10445139B2Oct 15, 2019
Control system in which communication between devices is controlled based on execution condition being satisfied, gateway device used in the control system, and control method for the control system
HITACHI LTD0 citations31
RENESAS TECH CORP
12 patentsUS7428720B2Sep 23, 2008
Standard cell for a CAD system
RENESAS TECH CORP17 citations93
US7217963B2May 15, 2007
Semiconductor integrated circuit device
RENESAS TECH CORP21 citations93
US7023058B2Apr 4, 2006
Semiconductor integrated circuit device
RENESAS TECH CORP24 citations93
US7159102B2Jan 2, 2007
Branch control memory
RENESAS TECH CORP27 citations91
US7380149B2May 27, 2008
Information processing device
RENESAS TECH CORP19 citations90
US7814343B2Oct 12, 2010
Semiconductor integrated circuit for reducing power consumption and enhancing processing speed
RENESAS TECH CORP10 citations84
US7124283B2Oct 17, 2006
Hardware accelerator for a platform-independent code
RENESAS TECH CORP18 citations83
US7612391B2Nov 3, 2009
Semiconductor integrated circuit device
RENESAS TECH CORP2 citations63
US7434030B2Oct 7, 2008
Processor system having accelerator of Java-type of programming language
RENESAS TECH CORP6 citations63
US7788469B2Aug 31, 2010
Information processing device having arrangements to inhibit coprocessor upon encountering data that the coprocessor cannot handle
RENESAS TECH CORP2 citations61
US7493479B2Feb 17, 2009
Method and apparatus for event detection for multiple instruction-set processor
RENESAS TECH CORP6 citations61
US7853776B2Dec 14, 2010
Handover between software and hardware accelerator
RENESAS TECH CORP1 citations52