Inventor
CHEN WEN-TZER T
US21 patents
⚠️ This page may combine multiple inventors who share the name “CHEN WEN-TZER T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
12 patentsUS9218190B2Dec 22, 2015
Hybrid virtual machine configuration management
IBM92 citations98
US5548735AAug 20, 1996
System and method for asynchronously processing store instructions to I/O space
IBM28 citations92
US9052932B2Jun 9, 2015
Hybrid virtual machine configuration management
IBM7 citations84
US7631131B2Dec 8, 2009
Priority control in resource allocation for low request rate, latency-sensitive units
IBM11 citations83
US10120726B2Nov 6, 2018
Hybrid virtual machine configuration management
IBM2 citations73
US11221884B2Jan 11, 2022
Hybrid virtual machine configuration management
IBM0 citations62
US9304820B2Apr 5, 2016
Sharing resources allocated to an entitled virtual machine
IBM2 citations62
US9513952B2Dec 6, 2016
Sharing resources allocated to an entitled virtual machine
IBM0 citations52
US9471368B2Oct 18, 2016
Sharing resources allocated to an entitled virtual machine
IBM0 citations52
US9323573B2Apr 26, 2016
Sharing resources allocated to an entitled virtual machine
IBM0 citations52
US9086888B2Jul 21, 2015
Using a plurality of tables for improving performance in predicting branches in processor instructions
IBM0 citations51
US10310860B2Jun 4, 2019
Starting and stopping instruction dispatch to execution unit queues in a multi-pipeline processor
IBM0 citations50
CHEN WEN-TZER T
5 patentsUS8677050B2Mar 18, 2014
System, method and computer program product for extending a cache using processor registers
CHEN WEN-TZER T9 citations83
US8549354B2Oct 1, 2013
Managing rollback in a transactional memory environment
CHEN WEN-TZER T2 citations61
US8180941B2May 15, 2012
Mechanisms for priority control in resource allocation
CHEN WEN-TZER T5 citations61
US8972706B2Mar 3, 2015
Performance in predicting branches
CHEN WEN-TZER T0 citations51
US8539281B2Sep 17, 2013
Managing rollback in a transactional memory environment
CHEN WEN-TZER T0 citations51
BELL JR ROBERT H
4 patentsUS8943272B2Jan 27, 2015
Variable cache line size management
BELL JR ROBERT H5 citations84
US9582284B2Feb 28, 2017
Performance of processors is improved by limiting number of branch prediction levels
BELL JR ROBERT H2 citations73
US8935478B2Jan 13, 2015
Variable cache line size management
BELL JR ROBERT H2 citations62
US8091073B2Jan 3, 2012
Scaling instruction intervals to identify collection points for representative instruction traces
BELL JR ROBERT H2 citations61