Inventor

VALLURI MADHAVI G

US9 patents

⚠️ This page may combine multiple inventors who share the name “VALLURI MADHAVI G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

4 patents

US7770140B2Aug 3, 2010

Method and apparatus for evaluating integrated circuit design model performance using basic block vectors and fly-by vectors including microarchitecture dependent information

IBM24 citations91

US7844928B2Nov 30, 2010

Method and apparatus for evaluating integrated circuit design performance using enhanced basic block vectors that include data dependent information

IBM11 citations82

US8010334B2Aug 30, 2011

Method and apparatus for evaluating integrated circuit design performance using basic block vectors, cycles per instruction (CPI) information and microarchitecture dependent information

IBM10 citations79

US9229746B2Jan 5, 2016

Identifying load-hit-store conflicts

IBM3 citations71

GLOBALFOUNDRIES INC

1 patent

US9298630B2Mar 29, 2016

Optimizing memory bandwidth consumption using data splitting with software caching

GLOBALFOUNDRIES INC3 citations72

VALLURI MADHAVI G

1 patent

US8745607B2Jun 3, 2014

Reducing branch misprediction impact in nested loop code

VALLURI MADHAVI G6 citations67

BELL JR ROBERT H

1 patent

US8091073B2Jan 3, 2012

Scaling instruction intervals to identify collection points for representative instruction traces

BELL JR ROBERT H2 citations61

KUMAR PRATHIBA

1 patent

US9032375B2May 12, 2015

Performance bottleneck identification tool

KUMAR PRATHIBA3 citations60

INDUKURU VENKAT R

1 patent

US9229745B2Jan 5, 2016

Identifying load-hit-store conflicts

INDUKURU VENKAT R1 citations49