Inventor

KOTLYAR ROZA

US47 patents

⚠️ This page may combine multiple inventors who share the name “KOTLYAR ROZA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KOTLYAR ROZA

INTEL CORP

Transistors with high concentration of boron doped germanium

Conductive bridge random access memory (CBRAM) devices with low thermal conductivity electrolyte sublayer

Transistors with high concentration of germanium

Stacked channel structures for MOSFETs

High mobility strained channels for fin-based NMOS transistors

Vertical nanowire transistor with axially engineered semiconductor and gate metallization

High mobility strained channels for fin-based transistors

Stacked nanowire transistor structure with different channel geometries for stress

Method of fabricating CMOS FinFETs by selectively etching a strained SiGe layer

Method of fabricating a semiconductor device with strained SiGe fins and a Si cladding layer

Hexagonal arrays for quantum dot devices

CMOS FinFET device with dual strained cladding layers on relaxed SiGe fins, and method of fabricating the same

Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs

High mobility strained channels for fin-based transistors

Vertical transistor devices for embedded memory and logic technologies

Quantum well stacks for quantum dot devices

Quantum dot devices with side and center screening gates

Functional metal oxide based microelectronic devices

Vertical nanowire transistor with axially engineered semiconductor and gate metallization

Quantum well stacks for quantum dot devices

Quantum dot devices with strain control

Fin strain in quantum dot devices

Silicon PMOS with gallium nitride NMOS for voltage regulation

Germanium-based quantum well devices

Gate-all-around integrated circuit structures having high mobility

Lateral gate material arrangements for quantum dot devices

Gate-all-around integrated circuit structures having high mobility

High mobility strained channels for fin-based NMOS transistors

P-tunneling field effect transistor device with pocket

CMOS FinFET device having strained SiGe fins and a strained Si cladding layer on the NMOS channel

Germanium tin channel transistors

Germanium-based quantum well devices

Heterogeneous pocket for tunneling field effect transistors (TFETs)

Transistor structure with variable clad/core dimension for stress and bandgap

Non-planar device having uniaxially strained semiconductor body and method of making same

Germanium-based quantum well devices

N-type and P-type tunneling field effect transistors (TFETs)

Methods of forming low band gap source and drain structures in microelectronic devices

CEA STEPHEN M

High mobility strained channels for fin-based transistors

Non-planar device having uniaxially strained semiconductor body and method of making same

DOYLE BRIAN S

Vertical transistor devices for embedded memory and logic technologies

Vertical nanowire transistor with axially engineered semiconductor and gate metallization

KOTLYAR ROZA

Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs

Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs

PILLARISETTY RAVI

Germanium-based quantum well devices

Germanium-based quantum well devices

MURTHY ANAND S

Transistors with high concentration of boron doped germanium