Inventor

KAMATH ARVIND

US57 patents

⚠️ This page may combine multiple inventors who share the name “KAMATH ARVIND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KAMATH ARVIND

LSI LOGIC CORP

Method of shallow trench isolation formation and planarization

Method of reducing silicon oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness with other transistors of the hybrid circuit

Shallow junction formation

Method of manufacturing a shallow trench isolation structure with low trench parasitic capacitance

Polysilicon gate salicidation

Method of forming an antifuse on a semiconductor substrate using wet oxidation of a nitrided substrate

Method of reducing silicon oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness with other transistors of the hybrid circuit

Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit

Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit

Etch resistant shallow trench isolation in a semiconductor wafer

High density memory with storage capacitor

Method of reducing the effect of implantation damage to shallow trench isolation regions during the formation of variable thickness gate layers

Method characterizing materials for a trench isolation structure having low trench parasitic capacitance

Modular growth of multiple gate oxides

Method of shallow trench isolation formation and planarization

Hard mask removal

High density memory with storage capacitor

KAMATH ARVIND

High precision capacitors

Profile engineered, electrically active thin film devices

Printed dopant layers

Diffusion barrier coated substrates and methods of making the same

Printed non-volatile memory

Printed non-volatile memory

Methods for forming electrically precise capacitors, and structures formed therefrom

Diffusion barrier coated substrates and methods of making the same

THIN FILM ELECTRONICS ASA

Dopant inks, methods of making dopant inks, and methods of using dopant inks

Wireless communication device with integrated ferrite shield and antenna, and methods of manufacturing the same

Methods for forming electrically precise capacitors on insulative substrates, and structures formed therefrom

High precision capacitors

Method for modifying and controlling the threshold voltage of thin film transistors

Printed dopant layers

Print processing for patterned conductor, semiconductor and dielectric materials

KOVIO INC

Printed non-volatile memory

Printed dopant layers

Methods for manufacturing RFID tags and structures formed therefrom

Printed dopant layers

CHANDRA ADITI

Method of forming metal silicide contact and metal interconnect

Methods of making metal silicide contacts, interconnects, and/or seed layers

Stacked solid state batteries and methods of making the same

Stacked solid state batteries and methods of making the same

VAN DER LINDE RICHARD

Solid-state battery and method of making the same

Solid-state battery and method of making the same

LSI CORP

Shallow trench isolation structure with low trench parasitic capacitance

ROCKENBERGER JOERG

Printed, self-aligned, top gate thin film transistor

SMITH PATRICK

Method for making surveillance devices with multiple capacitors

SCHER ERIK

Print processing for patterned conductor, semiconductor and dielectric materials

WANG ZHONGCHUN

Multilayer solid-state electrolyte, battery cells including the same, and methods of making the same

CLEEVES JAMES MONTAGUE

Methods for manufacturing RFID tags and structures formed therefrom

GUO WENZHUO

Method for modifying and controlling the threshold voltage of thin film transistors

SUBRAMANIAN VIVEK

High reliability surveillance and/or identification tag/devices and methods of making and using the same