Inventor

VARGAS JOSE A

US20 patents

⚠️ This page may combine multiple inventors who share the name “VARGAS JOSE A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VARGAS JOSE A

INTEL CORP

General input/output architecture, protocol and related methods to support legacy interrupts

OS and firmware coordinated error handling using transparent firmware intercept and firmware services

Method, system, and apparatus for dynamic reconfiguration of resources

Configurable error handling apparatus and methods to operate the same

Method, system, and apparatus for dynamic reconfiguration of resources

Apparatus and method for detecting and recovering from data fetch errors

Apparatus and method for detecting and recovering from data fetch errors

Instruction and logic for machine checking communication

YIGZAW THEODROS

Injecting a data error into a writeback path to memory

Apparatus and method for implement a multi-level memory hierarchy

Method and apparatus for injecting errors into memory

Apparatus and method for detecting and recovering from data fetch errors

AYYAR MANI

Method, system, and apparatus for dynamic reconfiguration of resources

Method, system, and apparatus for dynamic reconfiguration of resources

Method, system, and apparatus for dynamic reconfiguration of resources

VARGAS JOSE A

Machine check summary register

JAYAKUMAR SARATHY

Recovery after input/ouput error-containment events

YAMADA KOICHI

Method and apparatus to enable runtime processor migration with operating system assistance

NACHIMUTHU MURUGASAMY

Secure error handling

NuCell Hydro

Fuel augmentation support system