Inventor

PIETAMBARAM SRINIVAS V

US74 patents

⚠️ This page may combine multiple inventors who share the name “PIETAMBARAM SRINIVAS V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PIETAMBARAM SRINIVAS V

INTEL CORP

Inorganic-based embedded-die layers for modular semiconductive devices

Cavity generation for embedded interconnect bridges utilizing temporary structures

Photonic integrated circuit packaging architectures

RFIC having coaxial interconnect and molded layer

Integrated magnetic inductors for embedded-multi-die interconnect bridge substrates

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers

Surface finishes for high density interconnect architectures

Surface finishes for high density interconnect architectures

Semiconductor package having nonspherical filler particles

Photonic interconnect and components in glass

Nested glass packaging architecture for hybrid electrical and optical communication devices

Nested interposer with through-silicon via bridge die

Electrical interconnect bridge

Electrical interconnect bridge

Stretchable electronic assembly

Flexible die to floor planning with bump pitch scale through glass core via pitch

Integrated optical coupler

Faraday rotator interconnect as a through-via configuration in a patch architecture

Glass substrates having signal shielding for use with semiconductor packages and related methods

Inorganic-based embedded-die layers for modular semiconductive devices

Integrated circuit package supports

Integrated circuit package supports

Inorganic-based embedded-die layers for modular semiconductive devices

Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Integrated circuit package supports

Electroless-catalyst doped-mold materials for integrated-circuit die packaging architectures

Package substrate having copper alloy sputter seed layer and high density interconnects

EVERSPIN TECHNOLOGIES INC

MRAM synthetic anitferomagnet structure

Methods of manufacturing magnetoresistive MTJ stacks having an unpinned, fixed synthetic anti-ferromagnetic structure

Magnetoresistive MTJ stack having an unpinned, fixed synthetic anti-ferromagnetic structure

MRAM having an unpinned, fixed synthetic anti-ferromagnetic structure

MRAM synthetic anitferomagnet structure

Methods and apparatus for a synthetic anti-ferromagnet structure with reduced temperature dependence

Magnetoresistive stacks with an unpinned, fixed synthetic anti-ferromagnetic structure and methods of manufacturing thereof

Magnetoresistive stacks with an unpinned, fixed synthetic anti-ferromagnetic structure and methods of manufacturing thereof

Low power magnetoelectronic device structures utilizing enhanced permeability materials

Enhanced permeability device structures and method

Magnetic tunnel junction memory and method with etch-stop layer

Magnetoresistive stacks with an unpinned, fixed synthetic anti-ferromagnetic structure and methods of manufacturing thereof

FREESCALE SEMICONDUCTOR INC

Amorphous alloys for magnetic devices

Method of making amorphous alloys for semiconductor device

Synthetic antiferromagnet structures for use in MTJs in MRAM technology

Low power magnetoelectronic device structures utilizing enhanced permeability materials

Synthetic antiferromagnet structures for use in MTJs in MRAM technology

PIETAMBARAM SRINIVAS V

MRAM synthetic antiferromagnet structure

Molded embedded bridge for enhanced EMIB applications

MOTOROLA INC

High K dielectric film

TAHOE RES LTD

Electromigration resistant and profile consistent contact arrays