Inventor

LEE KYU-OH

US68 patents

⚠️ This page may combine multiple inventors who share the name “LEE KYU-OH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE KYU-OH

INTEL CORP

Microelectronic assemblies having a cooling channel

Phase change material in substrate cavity

Package with bi-layered dielectric structure

Integration of pressure sensors into integrated circuit fabrication and packaging

Tin-zinc microbump structures

Package with underfill containment barrier

Methods of forming sensor integrated packages and structures formed thereby

Inorganic interposer for multi-chip packaging

Cavity structures in integrated circuit package supports

Methods to incorporate thin film capacitor sheets (TFC-S) in the build-up films

Galvanic corrosion protection for semiconductor packages

Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same

Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate

Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same

Magnet placement for integrated sensor packages

Methods to pattern TFC and incorporation in the ODI architecture and in any build up layer of organic substrate

Integrated circuit structures with recessed conductive contacts for package on package

Copper seed layer and nickel-tin microbump structures

Integrated circuit structures with recessed conductive contacts for package on package

Package with underfill containment barrier

Methods of embedding magnetic structures in substrates

Semiconductor packages with embedded interconnects

Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate

Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate

Die interconnect substrates, a semiconductor device and a method for forming a die interconnect substrate

Device, method, and system to provide passivation structures of a magnetic material based inductor

Microelectronic assemblies having conductive structures with different thicknesses on a core substrate

Methods to selectively embed magnetic materials in substrate and corresponding structures

Substrate assembly with encapsulated magnetic feature

Methods to embed magnetic material as first layer on coreless substrates and corresponding structures

Magnetic core inductors

Release layer-assisted selective embedding of magnetic material in cored and coreless organic substrates

Methods to selectively embed magnetic materials in substrate and corresponding structures

Substrate assembly with encapsulated magnetic feature

Methods for attaching large components in a package substrate for advanced power delivery

Methods to embed magnetic material as first layer on coreless substrates and corresponding structures

Microelectronic assemblies having conductive structures with different thicknesses on a core substrate

Embedding magnetic material, in a cored or coreless semiconductor package

Techniques for an inductor at a first level interface

Semiconductor package having a coaxial first layer interconnect

Techniques for an inductor at a second level interface

Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same

Indium solder metallurgy to control electro-migration

Techniques for an inductor at a second level interface

Package with underfill containment barrier

Package with underfill containment barrier

KARHADE OMKAR G

Reliable microstrip routing for electronics components

Reliable microstrip routing for electronics components

LEE KYU OH

Integration of pressure or inertial sensors into integrated circuit fabrication and packaging

Semiconductor packages with embedded bridge interconnects