P

Inventor

MIGNOT YANN A M

US33 patents
⚠️ This page may combine multiple inventors who share the name “MIGNOT YANN A M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

27 patents
US9991156B2Jun 5, 2018

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM15 citations93
US10586732B2Mar 10, 2020

Via cleaning to reduce resistance

IBM7 citations84
US10410875B2Sep 10, 2019

Alternating hardmasks for tight-pitch line formation

IBM4 citations84
US9779944B1Oct 3, 2017

Method and structure for cut material selection

IBM17 citations84
US9691659B1Jun 27, 2017

Via and chamfer control for advanced interconnects

IBM14 citations84
US9607886B1Mar 28, 2017

Self aligned conductive lines with relaxed overlay

IBM6 citations84
US10103022B2Oct 16, 2018

Alternating hardmasks for tight-pitch line formation

IBM8 citations83
US10090378B1Oct 2, 2018

Efficient metal-insulator-metal capacitor

IBM4 citations83
US10957583B2Mar 23, 2021

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM1 citations73
US10546774B2Jan 28, 2020

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM3 citations73
US10312103B2Jun 4, 2019

Alternating hardmasks for tight-pitch line formation

IBM1 citations73
US10032633B1Jul 24, 2018

Image transfer using EUV lithographic structure and double patterning process

IBM3 citations73
US9852946B1Dec 26, 2017

Self aligned conductive lines

IBM2 citations73
US9837351B1Dec 5, 2017

Avoiding gate metal via shorting to source or drain contacts

IBM3 citations73
US9786554B1Oct 10, 2017

Self aligned conductive lines

IBM5 citations73
US9773700B1Sep 26, 2017

Aligning conductive vias with trenches

IBM5 citations73
US10580652B2Mar 3, 2020

Alternating hardmasks for tight-pitch line formation

IBM2 citations72
US11557507B2Jan 17, 2023

Via cleaning to reduce resistance

IBM0 citations62
US10395985B2Aug 27, 2019

Self aligned conductive lines with relaxed overlay

IBM0 citations52
US10083864B2Sep 25, 2018

Self aligned conductive lines with relaxed overlay

IBM0 citations52
US10062605B2Aug 28, 2018

Via and chamfer control for advanced interconnects

IBM0 citations52
US10043744B2Aug 7, 2018

Avoiding gate metal via shorting to source or drain contacts

IBM1 citations52
US9972533B2May 15, 2018

Aligning conductive vias with trenches

IBM0 citations52
US9911647B2Mar 6, 2018

Self aligned conductive lines

IBM1 citations52
US10256289B2Apr 9, 2019

Efficient metal-insulator-metal capacitor fabrication

IBM0 citations51
US10354885B2Jul 16, 2019

Hard masks for block patterning

IBM0 citations50
US10090164B2Oct 2, 2018

Hard masks for block patterning

IBM0 citations50

TESSERA INC

4 patents

TESSERA LLC

1 patent

ADEIA SEMICONDUCTOR SOLUTIONS LLC

1 patent