Inventor

DONLEY GREGGORY D

US28 patents

⚠️ This page may combine multiple inventors who share the name “DONLEY GREGGORY D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DONLEY GREGGORY D

ADVANCED MICRO DEVICES INC

Cache word of interest latency organization

System-wide low power management

Bandwidth matched scheduler

Compression of frequent data values across narrow links

System-wide low power management

Method for maintaining cache consistency during reordering

Input/output memory map unit and northbridge

Re-purposing byte enables as clock enables for power savings

Method and apparatus for compressing addresses

Compression of frequent data values across narrow links

Input/output memory map unit and northbridge

UNISYS CORP

Livelock avoidance

Avoiding instability

Random delay subsystems

Data resynchronization

Methods to avoid instability

Resynchronization of data

Data transmit resynchronization at a node

DONLEY GREGGORY D

Subcache affinity

Cache partitioning

Method and apparatus for selectively bypassing a cache for trace collection in a processor

Queue freeze on protocol error

GLOBALFOUNDRIES INC

Partial CRC insertion in data packets for early forwarding

Method and apparatus for handling excess data during memory access

Command packet packing to mitigate CRC overhead

(unassigned)

Method for cycle request with quick termination without waiting for the cycle to reach the destination by storing information in queue

HUGHES WILLIAM A

Command packet packing to mitigate CRC overhead

LEPAK KEVIN M

Method and apparatus for accelerated shared data migration