P

Inventor

STRACH THOMAS

DE21 patents
⚠️ This page may combine multiple inventors who share the name “STRACH THOMAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

20 patents
US11112846B2Sep 7, 2021

Predictive on-chip voltage simulation to detect near-future under voltage conditions

IBM11 citations85
US9839131B2Dec 5, 2017

Embedding a discrete electrical device in a printed circuit board

IBM7 citations84
US9673179B1Jun 6, 2017

Discrete electronic device embedded in chip module

IBM6 citations84
US9141421B2Sep 22, 2015

Reducing power grid noise in a processor while minimizing performance loss

IBM8 citations83
US9740813B1Aug 22, 2017

Layout effect characterization for integrated circuits

IBM4 citations72
US10461715B1Oct 29, 2019

Mitigating power noise using a current supply

IBM2 citations71
US9980385B2May 22, 2018

Discrete electronic device embedded in chip module

IBM1 citations62
US7266788B2Sep 4, 2007

Via/BSM pattern optimization to reduce DC gradients and pin current density on single and multi-chip modules

IBM4 citations62
US10734317B2Aug 4, 2020

Discrete electronic device embedded in chip module

IBM0 citations52
US10354946B2Jul 16, 2019

Discrete electronic device embedded in chip module

IBM0 citations52
US10149388B2Dec 4, 2018

Method for embedding a discrete electrical device in a printed circuit board

IBM0 citations52
US9684759B2Jun 20, 2017

De-coupling capacitance placement

IBM1 citations52
US9679099B2Jun 13, 2017

De-coupling capacitance placement

IBM1 citations52
US11586267B2Feb 21, 2023

Fine resolution on-chip voltage simulation to prevent under voltage conditions

IBM0 citations51
US10725517B2Jul 28, 2020

Distributed on chip network to mitigate voltage droops

IBM0 citations51
US10481662B2Nov 19, 2019

Distributed on chip network to mitigate voltage droops

IBM0 citations51
US10114914B2Oct 30, 2018

Layout effect characterization for integrated circuits

IBM0 citations51
US9904748B1Feb 27, 2018

Layout effect characterization for integrated circuits

IBM0 citations51
US9146772B2Sep 29, 2015

Reducing power grid noise in a processor while minimizing performance loss

IBM0 citations51
US10145892B2Dec 4, 2018

Increasing the resolution of on-chip measurement circuits

IBM1 citations48

GLOBALFOUNDRIES INC

1 patent