Inventor
PEARCE JONATHAN
US19 patents
⚠️ This page may combine multiple inventors who share the name “PEARCE JONATHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS11620256B2Apr 4, 2023
Systems and methods for improving cache efficiency and utilization
INTEL CORP36 citations97
US10776110B2Sep 15, 2020
Apparatus and method for adaptable and efficient lane-wise tensor processing
INTEL CORP20 citations91
US12210477B2Jan 28, 2025
Systems and methods for improving cache efficiency and utilization
INTEL CORP2 citations85
US10909039B2Feb 2, 2021
Data prefetching for graphics data processing
INTEL CORP5 citations84
US11016929B2May 25, 2021
Scalar core integration
INTEL CORP7 citations83
US11762804B2Sep 19, 2023
Scalar core integration
INTEL CORP1 citations73
US11409693B2Aug 9, 2022
Scalar core integration
INTEL CORP2 citations73
US10915328B2Feb 9, 2021
Apparatus and method for a high throughput parallel co-processor and interconnect with low offload latency
INTEL CORP3 citations71
US11093250B2Aug 17, 2021
Apparatus and method for gang invariant operation optimizations using dynamic evaluation
INTEL CORP2 citations70
US12117962B2Oct 15, 2024
Scalar core integration
INTEL CORP0 citations62
US11892950B2Feb 6, 2024
Data prefetching for graphics data processing
INTEL CORP0 citations62
US11409658B2Aug 9, 2022
Data prefetching for graphics data processing
INTEL CORP0 citations62
US11709714B2Jul 25, 2023
Thread group scheduling for graphics processing
INTEL CORP1 citations61
US11281496B2Mar 22, 2022
Thread group scheduling for graphics processing
INTEL CORP0 citations61
US11379229B2Jul 5, 2022
Apparatus and method for adaptable and efficient lane-wise tensor processing
INTEL CORP0 citations58
US10831505B2Nov 10, 2020
Architecture and method for data parallel single program multiple data (SPMD) execution
INTEL CORP0 citations50