Inventor
KIM SUNGYE
US35 patents
Patents
35 patentsUS11113784B2Sep 7, 2021
Sparse optimizations for a matrix accelerator architecture
INTEL CORP46 citations97
US12182035B2Dec 31, 2024
Systems and methods for cache optimization
INTEL CORP6 citations86
US11954062B2Apr 9, 2024
Dynamic memory reconfiguration
INTEL CORP3 citations85
US11676239B2Jun 13, 2023
Sparse optimizations for a matrix accelerator architecture
INTEL CORP10 citations85
US12141094B2Nov 12, 2024
Systolic disaggregation within a matrix accelerator architecture
INTEL CORP2 citations84
US10909039B2Feb 2, 2021
Data prefetching for graphics data processing
INTEL CORP5 citations84
US11016929B2May 25, 2021
Scalar core integration
INTEL CORP7 citations83
US12124383B2Oct 22, 2024
Systems and methods for cache optimization
INTEL CORP3 citations75
US12056059B2Aug 6, 2024
Systems and methods for cache optimization
INTEL CORP3 citations75
US11972545B2Apr 30, 2024
Apparatus and method of guided neural network model for image processing
INTEL CORP4 citations74
US12561276B2Feb 24, 2026
Systems and methods for updating memory side caches in a multi-GPU configuration
INTEL CORP0 citations73
US12386779B2Aug 12, 2025
Dynamic memory reconfiguration
INTEL CORP0 citations73
US12124533B2Oct 22, 2024
Method and apparatus of spatially sparse convolution module for visual rendering and synthesis
INTEL CORP2 citations73
US11762804B2Sep 19, 2023
Scalar core integration
INTEL CORP1 citations73
US11409693B2Aug 9, 2022
Scalar core integration
INTEL CORP2 citations73
US11227358B2Jan 18, 2022
Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval
INTEL CORP2 citations73
US11119820B2Sep 14, 2021
Local memory sharing between kernels
INTEL CORP3 citations73
US11809905B2Nov 7, 2023
Local memory sharing between kernels
INTEL CORP0 citations63
US11561828B2Jan 24, 2023
Graphics systems and methods for accelerating synchronization using fine grain dependency check and scheduling optimizations based on available shared memory space
INTEL CORP0 citations63
US11036545B2Jun 15, 2021
Graphics systems and methods for accelerating synchronization using fine grain dependency check and scheduling optimizations based on available shared memory space
INTEL CORP1 citations63
US12561763B2Feb 24, 2026
Apparatus and method of guided neural network model for image processing
INTEL CORP0 citations62
US12293431B2May 6, 2025
Sparse optimizations for a matrix accelerator architecture
INTEL CORP0 citations62
US12223353B2Feb 11, 2025
Systems and methods for synchronization of multi-thread lanes
INTEL CORP0 citations62
US12117962B2Oct 15, 2024
Scalar core integration
INTEL CORP0 citations62
US11892950B2Feb 6, 2024
Data prefetching for graphics data processing
INTEL CORP0 citations62
US11869113B2Jan 9, 2024
Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval
INTEL CORP0 citations62
US11816500B2Nov 14, 2023
Systems and methods for synchronization of multi-thread lanes
INTEL CORP0 citations62
US11409658B2Aug 9, 2022
Data prefetching for graphics data processing
INTEL CORP0 citations62
US11709714B2Jul 25, 2023
Thread group scheduling for graphics processing
INTEL CORP1 citations61
US11416411B2Aug 16, 2022
Preemptive page fault handling
INTEL CORP1 citations61
US11281496B2Mar 22, 2022
Thread group scheduling for graphics processing
INTEL CORP0 citations61
US12450698B2Oct 21, 2025
Joint denoising and supersampling of graphics data
INTEL CORP0 citations58
US12254526B2Mar 18, 2025
On chip dense memory for temporal buffering
INTEL CORP0 citations52
US12400293B2Aug 26, 2025
Temporally amortized supersampling using a mixed precision convolutional neural network
INTEL CORP0 citations48
US12367549B2Jul 22, 2025
Motion vector refinement for temporally amortized supersampling
INTEL CORP0 citations47