Inventor

MATSUBARA YASUSHI

JP61 patents

⚠️ This page may combine multiple inventors who share the name “MATSUBARA YASUSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MATSUBARA YASUSHI

MICRON TECHNOLOGY INC

Cell bottom node reset in a memory array

Apparatuses and methods for reading memory cells

Cell bottom node reset in memory array

Apparatus and method for controlling erasing data in ferroelectric memory cells

Boundary protection in memory

Power gate circuits for semiconductor devices

Semiconductor memory device capable of performing soft-post-package-repair operation

Apparatus and method for controlling erasing data in ferroelectric memory cells

Apparatus and method for controlling erasing data in ferroelectric memory cells

Cell bottom node reset in a memory array

Grouping power supplies for a sleep mode

Memory cells and arrays of memory cells

Sequential voltage control for a memory device

Apparatus and method for controlling erasing data in ferroelectric memory cells

System and method for reading and writing memory management data through a non-volatile cell based register

Boundary protection in memory

Access schemes for access line faults in a memory device

Grouping power supplies for a sleep mode

System and method for reading and writing memory management data using a non-volatile cell based register

Sequential voltage control for a memory device

Access schemes for protecting stored data in a memory device

Cell bottom node reset in a memory array

Memory cells and arrays of memory cells

Access schemes for access line faults in a memory device

Access schemes for protecting stored data in a memory device

Semiconductor memory device capable of performing soft-post-package-repair operation

Systems and methods for memory device power off

Power gate circuits for semiconductor devices

Memory cells and arrays of memory cells

Apparatuses and methods for reading memory cells

NEC CORP

Synchronous type semiconductor memory system with less power consumption

Synchronous semiconductor memory having a reduced number of registers

Synchronous DRAM having a high data transfer rate

Semiconductor circuit device capable of reducing influence of a parasitic capacitor

Semiconductor memory device having main word lines and sub word lines

Semiconductor circuit device capable of reducing influence of a parasitic capacitor

Synchronous semiconductor memory

Semiconductor memory device having short read time

Signal receiver in an interface

ELPIDA MEMORY INC

Word line driving circuit putting word line into one of high level, low level and high impedance

Semiconductor memory device with transfer switch and method of operating the device

Semiconductor device having two fuses in parallel

Semiconductor memory device and test method thereof

Semiconductor memory device

Semiconductor storage device in which inactive word line potential is set

Semiconductor memory device

Reference potential generating circuit and semiconductor memory device having the same

PS4 LUXCO SARL

Semiconductor device that can adjust propagation time of internal clock signal

MATSUBARA YASUSHI

Computer-readable storage medium having stored thereon display control program, display control system, display control apparatus, and display control method

TOHOKU DOTETSU KABUSHIKI KAISH

Durable epoxy resin paint composition