Inventor
COLWELL MICHAEL
US5 patents
Patents
5 patentsUS5728612AMar 17, 1998
Method for forming minimum area structures for sub-micron CMOS ESD protection in integrated circuit structures without extra implant and mask steps, and articles formed thereby
LSI LOGIC CORP51 citations93
US5670890ASep 23, 1997
Switchable pull-ups and pull-downs for IDDQ testing of integrated circuits
LSI LOGIC CORP55 citations93
US5843813ADec 1, 1998
I/O driver design for simultaneous switching noise minimization and ESD performance enhancement
LSI LOGIC CORP38 citations90
US5644251AJul 1, 1997
Switchable pull-ups and pull-downs for IDDQ testing of integrated circuits
LSI LOGIC CORP35 citations89
US5773855AJun 30, 1998
Microelectronic circuit including silicided field-effect transistor elements that bifunction as interconnects
LSI LOGIC CORP17 citations82