Inventor
GARNER TREVOR
US11 patents
⚠️ This page may combine multiple inventors who share the name “GARNER TREVOR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CISCO TECH INC
7 patentsUS6832279B1Dec 14, 2004
Apparatus and technique for maintaining order among requests directed to a same address on an external bus of an intermediate network node
CISCO TECH INC94 citations97
US7411957B2Aug 12, 2008
Hardware filtering support for denial-of-service attacks
CISCO TECH INC134 citations96
US7174394B1Feb 6, 2007
Multi processor enqueue packet circuit
CISCO TECH INC29 citations91
US7124231B1Oct 17, 2006
Split transaction reordering circuit
CISCO TECH INC40 citations91
US7346059B1Mar 18, 2008
Header range check hash circuit
CISCO TECH INC39 citations90
US7461180B2Dec 2, 2008
Method and apparatus for synchronizing use of buffer descriptor entries for shared data packets in memory
CISCO TECH INC6 citations60
US8010966B2Aug 30, 2011
Multi-threaded processing using path locks
CISCO TECH INC5 citations57
CISCO TECH IND
2 patentsUS6757768B1Jun 29, 2004
Apparatus and technique for maintaining order among requests issued over an external bus of an intermediate network node
CISCO TECH IND184 citations98
US6708258B1Mar 16, 2004
Computer system for eliminating memory read-modify-write operations during packet transfers
CISCO TECH IND25 citations92