Inventor
CHAN SIMON SIU-SING
US27 patents
⚠️ This page may combine multiple inventors who share the name “CHAN SIMON SIU-SING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED MICRO DEVICES INC
16 patentsUS7456062B1Nov 25, 2008
Method of forming a semiconductor device
ADVANCED MICRO DEVICES INC25 citations93
US6670259B1Dec 30, 2003
Inert atom implantation method for SOI gettering
ADVANCED MICRO DEVICES INC25 citations92
US6624476B1Sep 23, 2003
Semiconductor-on-insulator (SOI) substrate having selective dopant implant in insulator layer and method of fabricating
ADVANCED MICRO DEVICES INC28 citations92
US7670915B1Mar 2, 2010
Contact liner in integrated circuit technology
ADVANCED MICRO DEVICES INC9 citations84
US6743666B1Jun 1, 2004
Selective thickening of the source-drain and gate areas of field effect transistors
ADVANCED MICRO DEVICES INC15 citations84
US7064067B1Jun 20, 2006
Reduction of lateral silicide growth in integrated circuit technology
ADVANCED MICRO DEVICES INC11 citations83
US6964875B1Nov 15, 2005
Array of gate dielectric structures to measure gate dielectric thickness and parasitic capacitance
ADVANCED MICRO DEVICES INC15 citations83
US7015076B1Mar 21, 2006
Selectable open circuit and anti-fuse element, and fabrication method therefor
ADVANCED MICRO DEVICES INC10 citations74
US6737337B1May 18, 2004
Method of preventing dopant depletion in surface semiconductor layer of semiconductor-on-insulator (SOI) device
ADVANCED MICRO DEVICES INC12 citations74
US6537866B1Mar 25, 2003
Method of forming narrow insulating spacers for use in reducing minimum component size
ADVANCED MICRO DEVICES INC7 citations74
US6969678B1Nov 29, 2005
Multi-silicide in integrated circuit technology
ADVANCED MICRO DEVICES INC8 citations72
US6841832B1Jan 11, 2005
Array of gate dielectric structures to measure gate dielectric thickness and parasitic capacitance
ADVANCED MICRO DEVICES INC6 citations72
US7023059B1Apr 4, 2006
Trenches to reduce lateral silicide growth in integrated circuit technology
ADVANCED MICRO DEVICES INC6 citations62
US7005357B2Feb 28, 2006
Low stress sidewall spacer in integrated circuit technology
ADVANCED MICRO DEVICES INC2 citations62
US7250667B2Jul 31, 2007
Selectable open circuit and anti-fuse element
ADVANCED MICRO DEVICES INC0 citations52
US7132352B1Nov 7, 2006
Method of eliminating source/drain junction spiking, and device produced thereby
ADVANCED MICRO DEVICES INC0 citations51
CYPRESS SEMICONDUCTOR CORP
4 patentsUS9831114B1Nov 28, 2017
Self-aligned trench isolation in integrated circuits
CYPRESS SEMICONDUCTOR CORP2 citations73
US9437470B2Sep 6, 2016
Self-aligned trench isolation in integrated circuits
CYPRESS SEMICONDUCTOR CORP3 citations73
US10256137B2Apr 9, 2019
Self-aligned trench isolation in integrated circuits
CYPRESS SEMICONDUCTOR CORP0 citations52
US9666591B2May 30, 2017
Non-volatile memory with silicided bit line contacts
CYPRESS SEMICONDUCTOR CORP0 citations52
CHAN SIMON SIU-SING
3 patentsUS8598005B2Dec 3, 2013
Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices
CHAN SIMON SIU-SING6 citations71
US8114736B2Feb 14, 2012
Integrated circuit system with memory system
CHAN SIMON SIU-SING3 citations61
US8102009B2Jan 24, 2012
Integrated circuit eliminating source/drain junction spiking
CHAN SIMON SIU-SING4 citations60